Vendor: M31 Technology Corp. Category: MIPI PHY

MIPI M-PHY v3.1 IP in TSMC(12/16nm, 28nm, 40nm, and 55nm)

MIPI M-PHY is a serial interface technology with high bandwidth capabilities, which is particularly developed for mobile applicat…

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MIPI C-PHY + 2 TSMC 28nm View all specifications

Overview

MIPI M-PHY is a serial interface technology with high bandwidth capabilities, which is particularly developed for mobile applications to obtain low pin counts along with excellent power efficiency. As a MIPI Alliance contributor and leading Interface IP provider, M31 provides silicon-proven and low-power M-PHY in various process nodes. The M-PHY IP is optimized for UFS (Universal Flash Storage) applications, follows MIPI M-PHY v4.1 spec, supports a wide range of high-speed (HS) and low-speed (LS) data transfer, and complies with the RMMI interface for seamless integration with upside controllers. Moreover, M31 also provides various lane configurations for the M-PHY IP to meet different bandwidth requirements.

Key features

  • Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2) and DigRF
  • High speed gears, HS-G1A/B, HS-G2A/B and HS-G3A/B with scalable power consumptions
  • Burst mode CDR with short sync length (< 16SI)
  • Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
  • Supports reference-less function during low-speed operation
  • Common lane configuration facilitates the lane scalability
  • Low latencies to switch to/from different power states
  • Supports multiple signal amplitudes
  • Supports internal loopback BIST functions for at-speed mass production testing
  • Certified with ASIL-B of ISO 26262

Silicon Options

Foundry Node Process Maturity
TSMC 28nm 28nm 280 nm —

Specifications

Identity

Part Number
M31 MIPI IP for Mobile / Automotive Applications
Vendor
M31 Technology Corp.
Type
Silicon IP

Standards & Interfaces

MIPI PHY
MIPI C-PHY , MIPI D-PHY , MIPI M-PHY

Provider

Contact M31 Technology Corp.

Learn more about MIPI PHY IP core

M31 on the Specification and Development of MIPI Physical Layer

MIPI is the abbreviation of "Mobile Industry Processor Interface". This article will introduce the physical layer specifications of MIPI architecture, and explain the features and benefits of D-PHY and C-PHY respectively. Then, the MIPI perspective on the development and challenges of automotive electronics and the professional MIPI technical services that M31 can provide will be shared.

M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C

With the rapid growth of AR/VR and high-resolution imaging systems such as drones and action cameras, MIPI CSI (Camera Serial Interface) and MIPI DSI (Display Serial Interface) require both high data throughput and low power consumption. M31 provides a MIPI C-PHY and D-PHY IP combo solution implemented on TSMC N3P and N3C processes.

Frequently asked questions about MIPI PHY IP

What is MIPI M-PHY v3.1 IP in TSMC(12/16nm, 28nm, 40nm, and 55nm)?

MIPI M-PHY v3.1 IP in TSMC(12/16nm, 28nm, 40nm, and 55nm) is a MIPI PHY IP core from M31 Technology Corp. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this MIPI PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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