Overview
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processors, and peripheral devices. Synopsys’ broad MIPI IP solution consists of PHYs in mainstream and advanced FinFET processes, controllers, verification IP, IP Prototyping Kits and Interface IP Subsystems.
As the market leader in MIPI IP, Synopsys supports the ecosystem by developing high-quality, cost-effective, and interoperable MIPI IP solutions that enable designers to deploy differentiated features in their mobile, automotive, artificial intelligence (AI), and IoT SoCs. Utilizing a single-vendor solution allows designers to lower the risk of integrating MIPI interfaces into SoCs and device ICs, while accelerating time-to-market.
Learn more about I2C / I3C IP core
Synopsys extended its long-standing collaboration with Infineon to deliver a Synopsys Virtualizer™ Development Kit (VDK) supporting Infineon’s AURIX™ RC1 microcontroller (MCU) family. The VDK equips automotive engineering teams with a virtual prototype of the AURIX™ RC1 MCU, Infineon’s new scalable computing platform for software-defined vehicle (SDV) and Physical AI applications.
Explore three agentic AI adoption paths that help chip design teams combine flexible AI stacks with trusted, physics-based engineering tools.
Supporting the European Chips Act, startups and research teams will gain access to Synopsys chip design solutions to advance Europe’s strategic goals in areas such as AI and high-performance computing (HPC)
Recognition highlights leadership in agentic AI design, advanced-node enablement, co-packaged optics, and silicon-proven IP for next-generation AI systems
Leading portfolio of engineering solutions positions Synopsys to capitalize on the continued expansion of digital and physical AI and the AI-driven transformation of engineering.
The companies signed an expansive, multi-year agreement to jointly develop GPT-Synopsys, a specialized model, optimized to use Synopsys EDA tools to perform semiconductor design workflows.