Vendor: PRSsemicon Group Category: MIPI PHY

MIPI DSI-2 v2.0 RX/TX FOR COMBO C/DPHY

Key features

  • Compliant with MIPI DSI-2 v2.0 MIPI D-PHY Standard v3.x, MIPI C-PHY V2.0/2.1
  • Up to 3 Gsps per trio using C-PHY. 17Gbps in 3 Trios.
  • Up to 2.5 Gbps per data lane of D-PHY (V2.0). 10Gbps in 4 Lanes
  • Programmable 1, 2, 3 (C-PHY) or 4 (D-PHY) Data Lane Configuration.
  • Forward and Reverse Communication
  • Configurable Virtual Channel up to 4
  • Operate in continuous and non-continuous clock modes.
  • Command and Video Mode are supported.
  • Burst and Non-Burst modes are supported.
  • Pulse and Event modes supported
  • Color Modes: 16, 18, 24 and 36 bpp
  • Display Stream Compression (DSC) Supported

Block Diagram

Specifications

Identity

Part Number
DSI-2 v2.0 backward compatible to all DSI versions
Vendor
PRSsemicon Group
Type
Silicon IP

Standards & Interfaces

MIPI PHY
MIPI D-PHY

Files

Note: some files may require an NDA depending on provider policy.

Provider

Frequently asked questions about MIPI PHY IP

What is MIPI DSI-2 v2.0 RX/TX FOR COMBO C/DPHY?

MIPI DSI-2 v2.0 RX/TX FOR COMBO C/DPHY is a MIPI PHY IP core from PRSsemicon Group listed on Semi IP Hub.

How should engineers evaluate this MIPI PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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