IP Accelerated (Bye Bye EDA 360)
Eric Esteve
Vendor:
PRSsemicon Group
Category:
MIPI PHY
MIPI CSI-2 v3.0 TRANSMITTER FOR COMBO C/DPHY
Key features
- Compliant with MIPI CSI Standard v3.x, v2.x, v1.x and MIPI D-PHY Standard v1.x, MIPI D-PHY Standard V2.x and MIPI C- PHY V1.x
- Up to 3 Gsps per trio using C-PHY. 17Gbps in 3 Trios.
- Up to 2.5 Gbps per data lane of D-PHY (V2.0). 10Gbps in 4 Lanes
- Programmable 1, 2, 3 (C-PHY) or 4 (D-PHY) Data Lane Configuration.
- Configurable up to 4 Virtual Channels
- Operate in continuous and non-continuous clock modes.
- Color Modes: 16, 18, 24 and 36 bpp
- Color Formats: YUV420 8, 10bits and without CSPS and Legacy, YUV422 8, 10bits, RGB-888, 565, 666, 555 and 444. RAW6, 7, 8, 10, 12 and 14.
- Register configuration through CCI interface
- Host Interface can be Pixel or AXI interface.
Block Diagram
CSI-2 TX v3.0, 2.0, 1.3, 1.1 block diagram
Specifications
Identity
Part Number
CSI-2 TX v3.0, 2.0, 1.3, 1.1
Vendor
PRSsemicon Group
Type
Silicon IP
Standards & Interfaces
MIPI PHY
MIPI D-PHY
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
India
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Frequently asked questions about MIPI PHY IP
What is MIPI CSI-2 v3.0 TRANSMITTER FOR COMBO C/DPHY?
MIPI CSI-2 v3.0 TRANSMITTER FOR COMBO C/DPHY is a MIPI PHY IP core from PRSsemicon Group listed on Semi IP Hub.
How should engineers evaluate this MIPI PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.