Vendor: Dolphin Semiconductor Category: ROM

Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 1024 k

Foundry Sponsored - Metal programmable ROM compiler - TSMC 90 nm LPeF - Non volatile memory optimized for low power - compiler ra…

Overview

Foundry Sponsored - Metal programmable ROM compiler - TSMC 90 nm LPeF - Non volatile memory optimized for low power - compiler range up to 1024 k

Key features

  • Foundry sponsored memory generator
  • For nominal voltage characterization corner
  • Configuration
  • Dolphin's SVT bit-cell and HVT transistors for periphery
  • Power reduction features
  • Dual Voltage capability 1.2 V +/-10% & 1.0 V +/-10%
  • Significant gain in dynamic power consumption compared to alternative ROM
  • Decrease of fabrication costs
  • Via 1 programmable ROM
  • Key patent for high density with only one programming layer
  • 5% to 10% gain in density over alternative ROM
  • Ultra low leakage
  • No leakage in memory plane
  • Minimal leakage in memory periphery
  • Easy Integration
  • Depending on memory capacity up to 5 different MUX options can be selected
  • High flexibility for address range and data range

Specifications

Identity

Part Number
sROMet-PHOENIX-NV.b-SVT.HVT_TSMC_90nm_eF_Generator
Vendor
Dolphin Semiconductor
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Frequently asked questions about ROM IP cores

What is Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 1024 k?

Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 1024 k is a ROM IP core from Dolphin Semiconductor listed on Semi IP Hub.

How should engineers evaluate this ROM?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ROM IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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