Timing Fragility Aware Selective Hardening of RISCV Soft Processors on SRAM Based FPGAs
This paper introduces a timing fragility aware selective hardening methodology for RISCV soft processors implemented on SRAM based FPGAs.
Vendor:
Zixin Microelectronics Technology Co. Ltd.
Category:
SRAM
Memory Compilers
Memory Compilers
Key features
- Low Leakage with retention (light and deep sleep)
- Power Gating with retention and without retention
- Dual Rail (SRAM Periphery at lower Voltage)
- Combinations of above low power options
- Generate larger instances(up to 2Mbits)
- BIST solution optimized to our memories
Specifications
Identity
Part Number
Memory Compilers
Vendor
Zixin Microelectronics Technology Co. Ltd.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about SRAM IP cores
What is Memory Compilers?
Memory Compilers is a SRAM IP core from Zixin Microelectronics Technology Co. Ltd. listed on Semi IP Hub.
How should engineers evaluate this SRAM?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SRAM IP.
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