Vendor: SmartDV Technologies Category: LPC

LPC Device IIP

LPC Device/Peripherals interface is full-featured, easy-to-use, synthesizable design, compatible with Standard LPC specification.

Contact Provider Request Datasheet

Overview

LPC Device/Peripherals interface is full-featured, easy-to-use, synthesizable design, compatible with Standard LPC specification. Through its LPC compatibility, it provides a simple interface to a wide range of low-cost devices. LPC Device IIP is proven in FPGA environment.The host interface of the LPC Peripherals/Device can be simple interface or can be AMBA APB, AMBA AHB, AMBA AHB-Lite,AMBA AXI,AMBA AXI-Lite, VCI, OCP, Avalon, PLB, Tilelink,Wishbone or Custom protocol.

LPC Device IIP is supported natively in Verilog and VHDL

Key features

  • Compliant with version 1.1 LPC Specification.
  • Full LPC Device/Peripheral functionality
  • Supports the following operations:
    • Memory read and write
    • I/O read and write
    • DMA read and write
    • Bus Master memory read and write
    • Bus Master I/O read and write
    • Firmware memory read and write
    • TPM read and write
  • Supports all transfer sizes
  • Supports 128 Bytes for Firmware read
  • Support a variable number of wait-states
  • Supports Sync timeout detection and abort transfer
  • Supports Sync field based error detection and reporting
  • Supports wake-up and other power state transitions
  • Peripheral is capable of responding to all types of LPC transactions
  • Supports Abort Mechanism as per specification
  • Supports soft reset
  • Supports Reset policy
  • Supports LPME#, LPCPD#, CLKRUN# Power management signals
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready
  • Simple interface allows easy connection to microprocessor/microcontroller devices

Block Diagram

LPC Device IIP block diagram

Benefits

  • Single Site license option is provided to companies designing in a single site.
  • Multi Sites license option is provided to companies designing in multiple sites.
  • Single Design license allows implementation of the IP Core in a single FPGA bitstream and ASIC.
  • Unlimited Designs, license allows implementation of the IIP Core in unlimited number of FPGA bitstreams and ASIC designs.

What’s Included?

  • The LPC Device interface is available in Source and netlist products.
  • The Source product is delivered in verilog.If needed, VHDL and SystemC can also be provided
  • Easy to use Verilog Test Environment with Verilog Testcases
  • Lint, CDC, Synthesis, Simulation Scripts with waiver files
  • IP-XACT RDL generated address map
  • Firmware code and linux driver package
  • Documentation contains User's Guide and Release notes.

Specifications

Identity

Part Number
LPC Device IIP
Vendor
SmartDV Technologies
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact SmartDV Technologies

Learn more about LPC IP core

Low Power Design in SoC Using Arm IP

This paper discusses about the low power IP components from ARM can help one to realize the low power features in the SoC. It should be noted that this paper does not discuss about the low power concepts or design techniques. Rather, it focuses on the implementation approaches using ARM low power IP.

Ultra HD H.264 Video Codec IP solution on Zynq FPGA

Numerous industries in broadcast, cable, videoconferencing and consumer electronics space are using H.264 as the video codec of choice for their products and services. The H.264/AVC video coding standard achieves a significant improvement in coding efficiency with increased computational complexity relative to former standards.

ATPG Challenges at Lower Technology Nodes

With regards to the ongoing trend of diminishing transistor geometries, we are witnessing a sharp increase in defect density along with significant on-chip process variations that affect transistor size, threshold voltage, and wire resistance.

Frequently asked questions about LPC IP cores

What is LPC Device IIP?

LPC Device IIP is a LPC IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this LPC?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this LPC IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP