Vendor: IP-Maker Category: Channel Coding

LDPC Encoder/Decoder IP Core

Nand Flash write cycles are limited.

Overview

Nand Flash write cycles are limited. An ECC detects and corrects failed operations, increasing the lifetime of the Nand Flash memory. For Nand Flash-based data storage, using an ECC is mandatory to ensure data validity. The IPM-LDPC is based on the LDPC algorithm. The  IPM-LDPC Encoder/Decoder is full-featured with multiple parameters to fit your own needs in FPGA and SoC designs.

In fact IPM-LDPC Encoder/Decoder is fully configurable, allowing to it reach the best latency or the smallest footprint.

Key features

  • IPM-LDPC for NandFlash Storage
    • Adaptable BER
    • Up to 6 checks per bit
    • customizable data path
  • IPM-LDPC for short code
    • option to be full asynchronous
    • option to be in 3 clock cycles
  • fully configurable
    • matrix generator
    • data path
    • number of iteration checks
    • packet size

Block Diagram

Benefits

  • Full hardware
  • High performance / low latency
  • Low gate count

What’s Included?

  • Verilog RTL source code
  • Simulation environment
  • Technical documentation
  • Technical support

Specifications

Identity

Part Number
IPM-LDPC
Vendor
IP-Maker
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: France

Learn more about Channel Coding IP core

Practical Considerations of LDPC Decoder Design in Communications Systems

This paper covers some practical aspects of designing the LDPC decoder starting from comparison between different techniques, different decoders parameters or standards, the effect of those parameters on the LDPC performance, also it discusses the algorithm selection process, and floating point implementation process.

Audio Transport in DisplayPort VIP

DisplayPort uses Secondary Data Packets (SDPs), which are transported over the Main-Link that are not main video stream data. This allows it to carry audio and video simultaneously. The VIP supports audio transmission both in the original mode as defined in the specification as well as just as any other SDP being transmitted.

Frequently asked questions about Channel Coding IP cores

What is LDPC Encoder/Decoder IP Core?

LDPC Encoder/Decoder IP Core is a Channel Coding IP core from IP-Maker listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP