Vendor: Xilinx, Inc. Category: Channel Coding

LDPC Encoder / Decoder

Forward Error Correction (FEC) codes such as Low Density Parity Check (LDPC) codes provide a means to control errors in data tran…

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Overview

Forward Error Correction (FEC) codes such as Low Density Parity Check (LDPC) codes provide a means to control errors in data transmissions over unreliable or noisy communication channels. The LDPC Encoder/Decoder core provides an optimized block for encoding and soft-decision decoding of these codes. Custom and standardized LDPC codes are supported through the ability to specify the parity check matrix through an AXI4-Lite bus.

Key features

  • Optimized for 5G Wireless (backhaul and baseband) and DOCSIS 3.1 applications
  • Highly configurable codes
    • A range of Quasi-Cyclic codes can be configured over an AXI4-Lite interface
    • Code parameter memory can be shared across up to 128 codes
    • Codes can be selected on a block-by-block basis
  • Normalized min-sum decoding algorithm
    • Normalization factor programmable (from 0.0625 to 1 in steps of 0.0625) for layers
    • Number of iterations between 1 and 63
      • Specified for each codeword
    • Early termination
      • Specified for each codeword to be none, one, or both of the following:
        • Parity check passes
        • No change in hard information or parity bits since last iteration
      • When configured as a decoder, soft or hard outputs
        • Specified for each codeword to include information and optional parity
      • In- or out-of-order execution of blocks, with user specified ID field to identify blocks

Specifications

Identity

Part Number
EF-DI-LDPC-ENC-DEC-SITE
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Xilinx, Inc.
HQ: USA
Contact Xilinx, Inc.

Learn more about Channel Coding IP core

Practical Considerations of LDPC Decoder Design in Communications Systems

This paper covers some practical aspects of designing the LDPC decoder starting from comparison between different techniques, different decoders parameters or standards, the effect of those parameters on the LDPC performance, also it discusses the algorithm selection process, and floating point implementation process.

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Frequently asked questions about Channel Coding IP cores

What is LDPC Encoder / Decoder?

LDPC Encoder / Decoder is a Channel Coding IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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