JTAG & ACJTAG IP
Most modern systems use high-speed, AC-coupled deferential pairs.
Overview
Most modern systems use high-speed, AC-coupled deferential pairs. While 1149.1 is an excellent tool for testing and diagnosing digital systems, it was designed for DC-coupled, TTL-level nets. AC coupling and deferential signals are not compatible with 1149.1. An IEEE working group studied the problem and developed a solution that became IEEE1149.6.
We provide a customized solution for JTAG(1149.1) and ACJTAG(1149.6). The ACJTAG IP provides an interface to connect with the customer's analog transceiver/Phy. In addition, provides AC and DC JTAG testing for the transceiver/Phy.
What’s Included?
- Items Included: RTL, Testbench, Tests
Specifications
Identity
Provider
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Frequently asked questions about SerDes Test / Debug IP cores
What is JTAG & ACJTAG IP?
JTAG & ACJTAG IP is a Test / Debug IP core from Proficient Design LLC listed on Semi IP Hub.
How should engineers evaluate this Test / Debug?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Test / Debug IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.