Overview
The Synopsys IP solutions for the ARM® AMBA® interconnect include synthesizable IP, verification IP (VIP) and automated assembly with Synopsys’ coreAssembler tool. The Synopsys IP for the AMBA interconnect allows designers to rapidly integrate infrastructure components into their systems-on-chip (SoC)
and verify results with less risk and a reduced design cycle. Complementing the synthesizable IP is the VIP for AMBA interconnect, which includes the master, slave and monitor, providing designers with a quick and efficient way to verify AMBA interconnect-based SoCs. The Synopsys coreAssembler tool provides an automated method for assembling and configuring IP in a subsystem and develops an initial verification testbench for both the AMBA 2.0 and AMBA 3 AXI, AMBA 4
AXI and ACE-Lite protocol-based designs. This automation reduces the complexity of designing AMBA-based subsystems and improves overall productivity for faster time-to-results.
Learn more about Bus Fabric IP core
Synopsys extended its long-standing collaboration with Infineon to deliver a Synopsys Virtualizer™ Development Kit (VDK) supporting Infineon’s AURIX™ RC1 microcontroller (MCU) family. The VDK equips automotive engineering teams with a virtual prototype of the AURIX™ RC1 MCU, Infineon’s new scalable computing platform for software-defined vehicle (SDV) and Physical AI applications.
Explore three agentic AI adoption paths that help chip design teams combine flexible AI stacks with trusted, physics-based engineering tools.
Supporting the European Chips Act, startups and research teams will gain access to Synopsys chip design solutions to advance Europe’s strategic goals in areas such as AI and high-performance computing (HPC)
Recognition highlights leadership in agentic AI design, advanced-node enablement, co-packaged optics, and silicon-proven IP for next-generation AI systems
Leading portfolio of engineering solutions positions Synopsys to capitalize on the continued expansion of digital and physical AI and the AI-driven transformation of engineering.
The companies signed an expansive, multi-year agreement to jointly develop GPT-Synopsys, a specialized model, optimized to use Synopsys EDA tools to perform semiconductor design workflows.