Overview
The Synopsys IP solutions for the ARM® AMBA® interconnect include synthesizable IP, verification IP (VIP) and automated assembly with Synopsys’ coreAssembler tool. The Synopsys IP for the AMBA interconnect allows designers to rapidly integrate infrastructure components into their systems-on-chip (SoC)
and verify results with less risk and a reduced design cycle. Complementing the synthesizable IP is the VIP for AMBA interconnect, which includes the master, slave and monitor, providing designers with a quick and efficient way to verify AMBA interconnect-based SoCs. The Synopsys coreAssembler tool provides an automated method for assembling and configuring IP in a subsystem and develops an initial verification testbench for both the AMBA 2.0 and AMBA 3 AXI, AMBA 4
AXI and ACE-Lite protocol-based designs. This automation reduces the complexity of designing AMBA-based subsystems and improves overall productivity for faster time-to-results.
Learn more about Bus Fabric IP core
This paper discusses how DesignWare VIP for OCP helps you test the spread of best-case, worst-case memory response.
This paper discusses about the intelligent low power techniques such as context based clock gating and how they are useful for IoT applications. It also describes how it improves the overall power efficiency of the system. The power statistics shared shows how the overall idle power and functional power consumption is significantly reduced. Further we discuss about how it can be combined with few other low power techniques to reduce the overall power
It's time for a new supplier-buyer relationship - SIP vendors must deliver a Total Quality Experience to SIP buyers
This paper discusses the integration and system verification challenges encountered when integrating a PCI Express digital intellectual property (IP) core into a Gigabit Ethernet design
The DesignWare® IP solution for the AMBA 3 AXI protocol enables designers to quickly and easily integrate the high-speed protocol into their (SoC) designs, while reducing risk and speeding time to results
This application note provides you with a very brief introduction to the emerging PCI Express protocol and explains how selecting the right digital and mixed signal IP can accelerate the implemention of this new standard into your designs.