Crystal-less USB2.0 device PHY
IP
- USB 2.0
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
Crystal-less USB2.0 device PHY
IP
Crystal-less USB2.0 device PHY
IP
Crystal-less USB2.0 device PHY
IP
IP
IP
IP
USB 1.1 PHY IP, UMC 0.5um Logic process
USB 1.1 PHY, UMC 0.5um Logic process 3.3V 1P3M.
USB 2.0 Device PHY IP, Non-Crystal mode support, HJTC 0.11um pFlash/LL process
USB2.0 PHY, crystal-less, HJ 0.11um pflash LL process.
USB 1.1.OTG PHY IP, HJTC 0.18um eFlash/G2 process
HJTC 0.18um eFlash process, USB 1.1 OTG.
AXI system Peripheral IP, AXI Bus System Interconnect, Soft IP
AXI bus interconnect.
MIPI Controller IP, CSI-2 Transmitter, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP
MIPI Transmitter Controller.
MIPI Controller IP, DSI Peripheral, Soft IP
MIPI DSI Peripheral Controller.
MIPI Controller IP, DSI Host, Soft IP
DSI Host Controller.
MIPI Controller IP, CSI-2 Receiver, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP
MIPI CSI Receiver Controller.
IP
10-bit dual-port 30MHz ~ 85MHz LVDS Tx;
IP
IP
10/100 Base-TX Fast Ethernet PHY; TSMC 55nm GP
IP
USB 2.0 OTG PHY IP, OTG, UMC 0.153um Logic process
USB OTG 2.0 PHY, UMC 0.153um Logic process.
Controller IP, SPI Flash controller, Soft IP
Flash Controller with SPI Interface.