IEEE 802.11n/ac/ax (WiFi) LDPC Decoder and Encoder

The WiFi family of standards (IEEE 802.11) is used for Wireless Local Area Networks (WLANs). Its first version from 1997 has been extended by many amendments such as IEEE 802.11n-2009. This amendment was developed in particular for high throughputs of 600 Mbit/s on the air interface. The amendment is now part of IEEE 802.11-2012. The standard uses convolutional codes for forward error correction as minimum requirement. LDPC codes are optional within the standard but because of their superiority over convolutional codes they are widely used today. The Creonic IEEE 802.11 LDPC decoder is a high performance implementation for WLAN and further applications and supports all LDPC codes as defined by the standard.

• Compliant with IEEE 802.11n, IEEE
  802.11ac, IEEE 802.11ax
• Support for all LDPC code rates (1/2,
  2/3, 3/4, 5/6)
• Support for all LDPC block lengths (648, 1296, and 1944 bits)

• Gains up to 3 dB compared to Viterbi decoders
• Low-power and low-complexity design
• Layered LDPC decoder architecture, for faster convergence behavior
• Block-to-block on-the-fly configuration.
• Early stopping criterion for iterative LDPC decoder, saving a considerable amount of energy
• Configurable amount of LDPC decoding iterations for trading-off throughput and error correction performance
• Collection of statistic information (number of modified information bits, number of iterations, decoding successful)
• Available for ASIC and FPGAs (AMD Xilinx, Intel)
• Deliverable includes VHDL source code or synthesized netlist, VHDL testbench, and Matlab, C or C++ bit-accurate simulation model

• Wireless Local Area Networks (WLAN)
• Ultra-wideband (UWB)
• Microwave Links
• Optical Links
• Further High-throughput Applications

• VHDL source code or synthesized netlist
• HDL simulation models e.g. for Aldec’s Riviera-PRO
• VHDL testbench
• bit-accurate Matlab, C or C++ simulation model
• comprehensive documentation