I3C - Function Controller
The I3c protocol, short for " Improved Inter - Integrated Circuit," is a communication protocol designed to improve upon the wide…
Overview
The I3c protocol, short for " Improved Inter - Integrated Circuit," is a communication protocol designed to improve upon the widely - used I2C protocol. It was developed by the MIPI Alliance, a global organization that aims to develop interface specifications for mobile devices.
The I3c protocol includes several key features that make it an improvement over I2C. For example, it supports higher data speed, around 12.5MHz, which allows for faster communication between devices. It also includes dynamic address assignment, which allows devices to be added or removed from the bus without disrupting the communication of other devices
Another feature of I3c is its support for both Legacy I2C slaves and I3C slave devices, which makes it compatible with a wide range of existing hardware. Additionally, it includes support for advanced features such as sensor fusion, which allows multiple sensors to be combined to provide more accurate data.In addition to the features mentioned earlier, the I3c protocol also includes support for low - power modes, which can help conserve battery life in mobile devices. It also includes enhanced error detection and correction capabilities, which can help ensure the reliability of data transmission.
Product Specifications :
- RTL Design (System Verilog).
- Test Bench (Universal Verification Methodology (UVM))
- Clock Frequency : 12MHz
- Modes : Singular Data Rate messaging (SDR).
- High Data Rate Mode Double Data Rate (HDR-DDR).
- HDR Ternary Symbol Pure - bus (HDR - TSP).
- HDR Ternary Symbol Legacy - inclusive - bus (HDR - TSL)
- Compatible with 8 bit Microcontroller
Product Options :
- Adaptations : Generic 8 Bit 8051 Microcontroller Interface available.
- PCI / AXI possible.
- Add - ons : Verification IP - UVM VIP.
Key features
- Two wire serial interface up to 12.5 MHz.
- Legacy I2C Device co - existence on the same bus.
- Dynamic Addressing while supporting Static Addressing for Legacy I2C Devices.
- Legacy I2C Messaging with the I2C protocol frame format possible.
- I2C - like Single Data Rate messaging (SDR).
- Optional High Data Rate messaging Modes (HDR) such as HDR - DDR, HDR - TSP, HDR - TSL.
- Multi - Drop capability.
- Multi - Master capability.
- In - Band Interrupt support.
- Hot - Join support.
- Synchronous Timing Support.
- Asynchronous Time Stamping.
- Protocol is robust in terms of data bytes transfer.
Block Diagram
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about I2C / I3C IP core
Maximizing the Usability of Your Chip Development: Design with Flexibility for the Future
MIPI I3C v1.1 - A Conversation with Ken Foust
How to Connect Sensors with I3C
MIPI CCI over I3C: Faster Camera Control for SoC Architects
Arasan I3C PHY - Ternary vs. Non-Ternary
Frequently asked questions about I2C / I3C IP cores
What is I3C - Function Controller?
I3C - Function Controller is a I2C / I3C IP core from Silicon Cores - a Div. of Silicon Interfaces listed on Semi IP Hub.
How should engineers evaluate this I2C / I3C?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this I2C / I3C IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.