Vendor: Xylon Category: I2S

I2S Receiver/Transmitter

The logiI2S IP core from Xylon's logicBRICKS™IP library is a module for I2S audio data receiving and/or transmitting.

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Overview

The logiI2S IP core from Xylon's logicBRICKS™IP library is a module for I2S audio data receiving and/or transmitting. The logiI2S IP's RX and TX submodules are I2S masters only.

The logiI2S is, like the other IP cores from Xylon logicBRICKS™ IP library, fully embedded into Xilinx Platform Studio (XPS) and the EDK.

Therefore it can be easily customized and tuned for optimal slice consumption and features set.

Key features

  • Configurable structure
  • OPB V2.0 bus interface for access into internal registers
  • PLB V3.4 bus interface for off-chip memory access
  • Adjustable memory interface width 16, 32, or 64 bits
  • single master clock for I2S timings generation
  • Dividable master clock by an embedded divisor
  • Adjustable sampling frequency
  • Configurable on-chip FIFO buffers
  • Supports various audio sample widths: 8, 16, 18, 20, and 24 bits
  • Configurable size of off-chip memory buffers
  • Buffers status monitoring
  • optimized for low slice count
  • prepared for Xilinx Platform Studio (XPS) and the EDK

Specifications

Identity

Part Number
logiI2S
Vendor
Xylon
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Xylon
HQ: Croatia
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Learn more about I2S IP core

Enabling AI Vision at the Edge

Computer vision has made tremendous advances in the last several years due to the proliferation of AI technology. The intersection of big data and massive parallel computing changed the way in which machines are programmed to understand unstructured 2D and 3D data, such as video feeds from cameras.

CSoC Platform / Digital Subsystem IP for IoT

This paper describes a CSoC platform and configurable digital subsystem IP which can be deployed for development of IOT edge devices. The paper encompasses the different attributes of IOT edge device that can cater multiple industry segments, key features and benefits of CSoC platform, components of the digital subsystem IP that enables rapid prototyping of SoCs for IOT applications.

Growing audio requirements in SoCs

As consumer devices such as tablets, media players and home theater systems continue to incorporate more audio functionality, the systems on chip (SoCs) designed for these devices become more complex. These SoCs must support a growing list of audio requirements such as a wider range of high-definition audio compression formats, multi-channel audio content, higher sampling rates and advanced audio post-processing functions.

Frequently asked questions about I2S IP cores

What is I2S Receiver/Transmitter?

I2S Receiver/Transmitter is a I2S IP core from Xylon listed on Semi IP Hub.

How should engineers evaluate this I2S?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this I2S IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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