Aragio Solutions Achieves ISO 9001:2015 Certification
Aragio Solutions, an industry leader and full-service provider of semiconductor IO design IP, is pleased to announce today that it has earned ISO 9001 certification.
Vendor:
Aragio Solutions
Category:
GPIO
HSTL I/O Pad Set
The HSTL library includes the driver / receiver cells and a full complement of power and support cells for both single-ended and …
Overview
The HSTL library includes the driver / receiver cells and a full complement of power and support cells for both single-ended and differential signaling. This pad set supports operation at 1.5V and 1.8V.
Key features
- • Mode select – 1.5V or 1.8V operation
- • Single-ended and differential signaling
- • HSTL capability
- o Standard HSTL (1.5V) and expanded HSTL (1.8V)
- o Data transfer rate – up to 533 MHz (1066 MT/sec)
- • Inline CUP wire bond implementation
- • Power-up sequencing independent design with Power-on Control
- • Robust ESD Protection
- o 2KV ESD Human Body Model (HBM)
- ? Compliant with JEDEC specification JS-001-2012 (April 2012)
- o 200 V ESD Machine Model (MM)
- ? Compliant with JEDEC specification JESD22-A115C (November 2010)
- o 500 V ESD Charge Device Model (CDM)
- ? Compliant with JESD22-C101E (December 2009)
- • Latch-up Immunity
- o Compliant with JESD78D (November 2011)
- o Tested using I-Test criteria of ±100mA at maximum ambient temperature of +125°C.
What’s Included?
- a. Physical abstract in LEF format (.lef)
- b. Timing models in Synopsys Liberty formats (.lib and .db)
- c. Calibre compatible LVS netlist in CDL format (.cdl)
- d. GDSII stream (.gds)
- e. Behavioral Verilog (.v)
- f. Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
- g. Databook (.pdf)
- h. Library User Guide - ESD Guidelines (.pdf)
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| UMC | 65nm | 65nm 650 nm | Silicon Proven |
Specifications
Identity
Part Number
RGO_UMC65_25V18_LL_52C_HSTL
Vendor
Aragio Solutions
Type
Silicon IP
Provider
HQ:
USA
Learn more about GPIO IP core
Aragio Solutions Offers Suite of Programmable GPIO I/O Libraries Supporting 65nm Common Platform Technology Available for Chartered Customers
ARAGIO announced today the immediate availability of silicon-proven I/O libraries for the 65-nanometer (nm) Common Platform technology process available from Chartered Semiconductor Manufacturing Ltd.
Aragio Solutions Offers Suite of High-Performance Mixed-Signal IP and I/O Libraries Targeted to Advanced Processes from Chartered
Critical IP Components Available on Chartered’s Leading-Edge Manufacturing Platform
Frequently asked questions about GPIO Pad Library IP cores
What is HSTL I/O Pad Set?
HSTL I/O Pad Set is a GPIO IP core from Aragio Solutions listed on Semi IP Hub. It is listed with support for umc Silicon Proven.
How should engineers evaluate this GPIO?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.