Vendor: Xylon Category: Video Processing

High Dynamic Range (HDR) Pipeline

The logiHDR is an Ultra High Definition (UHD) HDR pipeline designed for digital processing and image quality enhancements of the …

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Overview

The logiHDR is an Ultra High Definition (UHD) HDR pipeline designed for digital processing and image quality enhancements of the raw image data from HDR sensors. The logiHDR extracts the maximum detail from high-contrast scenes, i.e. scenes with objects highlighted by a direct sunlight and objects placed in extreme shades. The IP core accepts RGB-formatted video inputs with different color depths and merges different exposures into a single HDR image, dynamically enhances the luminance range, and enhances brightness in local areas. The logiHDR can be easily combined with the logiISP Image Signal Processing (ISP) IP core in flexible and configurable video pipelines with advanced processing capabilities.

The logiHDR High Dynamic Range (HDR) Pipeline IP core is prepackaged for Xilinx Vivado IP Integrator (IPI) tool, requires no skills beyond general tools knowledge and can be used in same ways as Xilinx IP cores.

Key features

  • Digitally processes and enhances raw image data from HDR camera sensors
  • Supports Xilinx® Zynq®-7000 AP SoC, 7 Series and newer FPGA device families
  • Complete and configurable HDR pipeline includes:
    • Multiple Exposure Merge, supporting two or three exposures
    • Dynamic Range Compression
    • Brightness Enhancement
  • Supports UHD 4K2Kp60 and resolutions up to 7680x7680 at lower refresh rates
  • Parallel pixel processing per clock: 1, 2, or pixels
  • Video input formats: RGB 8/10/12/14-bit per color
  • Video output formats: RGB 8/10/12-bit per color
  • Video Input and output are ARM® AMBA® AXI4-Stream protocol compliant
  • Optional registers are AMBA AXI4-Lite protocol compliant
  • Available for Xilinx Vivado® IP Integrator

Applications

  • Surveillance
  • Automotive Driver Assist
  • Machine Vision
  • Video Conferencing
  • Digital Signage
  • Medical Imaging
  • Aerospace and Defense

What’s Included?

  • Documentation: User’s Manual
  • Design File Formats: Encrypted VHDL
  • Constraints Files: Reference design constraint files
  • Verification/Validation: Simulated and HW validated
  • Reference Designs & Application Notes: logiREF-VIDEO-HDR-ISP reference design for the Xylon logiUVK kit
  • Additional Items:
    • logiUVK HDR UltraHD Video Kit
    • Stand-alone SW driver

Specifications

Identity

Part Number
logiHDR
Vendor
Xylon
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Xylon
HQ: Croatia
Contact Xylon

Learn more about Video Processing IP core

Picking the right MPSoC-based video architecture: Part 1

A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing

Analysis: ARC's Configurable Video Subsystems

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.

Frequently asked questions about Video Processing IP

What is High Dynamic Range (HDR) Pipeline?

High Dynamic Range (HDR) Pipeline is a Video Processing IP core from Xylon listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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