Vendor: Chips&Media, Inc. Category: Video Processing

Video decoder - AVC, MVC, MPEG-4, VC-1, MPEG-1/2, H.263, AVS Jizhun, AVS+ Guangdian, On2 VP8, Sorenson Spark, Theora

Contact Provider Request Datasheet
H.264 / AVC + 2 View all specifications

Key features

  • Multi-view Video Coding for Blu-ray 3D
  • Full coverage of stream on a web browser
  • Multi-level clock gating
  • Low host CPU resources under 1MIPS
  • Frame buffer compression
  • Low delay coding
  • Multi-instances
  • Burst-write-back (BWB)
  • On-the-fly down-scaler
  • MapConverter

Benefits

  • Provides high performance up to 1080p60
  • Supports MVC(Multi-view Video Coding) for Blu-ray 3D
  • Supports VP8(WebM), Theora as well as H.264 for HTML5
  • Full coverage of streams on a web browser and internet
  • Pre-configurable decoder format enabling SoC designers to optimize for area and power
  • Simultaneous decoding of the multi-channel, multi-format stream.
  • Memory challenge scheme including Tiled buffer map and 2D smart Cache
  • Ultra-low-power hardware architecture using multi-level clock gating
  • Low host CPU resources under 1MIPS
  • Proven performance with a system-level design that minimizes risk and time-to-market

Applications

  • Smartphones, Media Tablet PCs, Portable Multimedia Players, Desktop & Laptop PCs, Digital TVs, Digital Set-top boxes (STBs), Video Game Consoles, surveillance camera, driving recorder, etc.

What’s Included?

  • Fully verified synthesizable RTL source code
  • RTL test bench
  • S/W User Guide
  • Datasheet/Integration Guide
  • Verification Guide
  • Evaluation platform

Specifications

Identity

Part Number
BODA955
Vendor
Chips&Media, Inc.
Type
Silicon IP

Compute

Codec Standard
H.264 / AVC , MPEG-4 , VP8

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Chips&Media, Inc.
HQ: Rep of Korea
Contact Chips&Media, Inc.

Learn more about Video Processing IP core

Picking the right MPSoC-based video architecture: Part 1

A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing

Analysis: ARC's Configurable Video Subsystems

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.

Frequently asked questions about Video Processing IP

What is Video decoder - AVC, MVC, MPEG-4, VC-1, MPEG-1/2, H.263, AVS Jizhun, AVS+ Guangdian, On2 VP8, Sorenson Spark, Theora?

Video decoder - AVC, MVC, MPEG-4, VC-1, MPEG-1/2, H.263, AVS Jizhun, AVS+ Guangdian, On2 VP8, Sorenson Spark, Theora is a Video Processing IP core from Chips&Media, Inc. listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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