Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: ROM

GSMC 0.18umOTP Single-Port/Dual-Port SRAM and Diffusion ROM Compiler

VeriSilicon GSMC 0.18um G9 3.3V Synchronous Memory Compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.…

Overview

VeriSilicon GSMC 0.18um G9 3.3V Synchronous Memory Compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.18um Generic 1P3M 3.3V/5V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of word and bit lengths. While satisfying speed and power requirements, it is optimized for area efficiency.
VeriSilicon GSMC 0.18um G9 3.3V Synchronous Memory Compiler uses three layers within the blocks and supports metal 3 as the top metal. Dummy bit cells are synthesized with the intention to enhance reliability.

Key features

  • 1P3M/1P4M Low Cost
  • All 3.3v device
  • High Density
  • High Speed
  • Size Sensitive Self-Time Delay for Fast Access
  • Automatic Power Down
  • Tri-State Output(SRAM only)
  • Write Mask Function(SRAM & Register File)

Specifications

Identity

Part Number
GSMC18 G9 MC
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

Learn more about ROM IP core

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Frequently asked questions about ROM IP cores

What is GSMC 0.18umOTP Single-Port/Dual-Port SRAM and Diffusion ROM Compiler?

GSMC 0.18umOTP Single-Port/Dual-Port SRAM and Diffusion ROM Compiler is a ROM IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.

How should engineers evaluate this ROM?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ROM IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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