Vendor: SmartDV Technologies Category: GDDR

GDDR4 Synthesizable Transactor

GDDR4 Synthesizable Transactor provides a smart way to verify the GDDR4 component of a SOC or a ASIC in Emulator or FPGA platform.

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Overview

GDDR4 Synthesizable Transactor provides a smart way to verify the GDDR4 component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's GDDR4 Synthesizable Transactor is fully compliant with standard GDDR4Spec rev 04.pdf Specification and provides the following features.

Key features

  • Supports 100% of GDDR4 protocol standard GDDR4Spec rev 04
  • Supports all the GDDR4 commands as per the specs
  • Supports all types of timing and protocol violation detection
  • Supports all mode registers programming
  • Supports double data rate architecture
  • Supports programmable clock frequency of operation
  • Supports single ended read strobe (RDQS) per byte
  • Supports single ended write strobe (WDQS) per byte
  • Supports quad or eight internal banks for concurrent operation
  • Checks for following:
    • Check-points include power on, initialization and power off rules
    • State based rules, active command rules
    • Read/write command rules etc
    • All timing violations
  • Supports programmable burst length: 8 only
  • Supports data mask (DM) for masking write data
  • Supports multiplexed addressing
  • Supports auto precharge option for each burst access
  • Supports auto refresh and self refresh modes
  • Supports on‐die termination (ODT)
  • Supports programmable offset for both driver and termination
  • Supports parity and boundary scan
  • Notifies the test bench of significant events such as transactions, warnings, timing and protocol violations

Block Diagram

GDDR4 Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the GDDR4 testcases
  • Examples showing how to connect various components, and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and function's used in verification env
  • Documentation contains User's Guide and Release notes

Specifications

Identity

Part Number
GDDR4 Transactor
Vendor
SmartDV Technologies
Type
Silicon IP
Controller / PHY
Controller

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact SmartDV Technologies

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Frequently asked questions about GDDR Interface IP

What is GDDR4 Synthesizable Transactor?

GDDR4 Synthesizable Transactor is a GDDR IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this GDDR?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GDDR IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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