UMC L65LL 65nm General Purpose PLL - 120MHz-600MHz
True Circuits, Inc.
•
HQ:
USA
The General Purpose PLL is a wide range clock multiplier with deskew capability.
- UMC
- 65nm
- LL
Compare 2,955 UMC IP Cores from 31 vendors
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UMC L65SP 65nm General Purpose PLL - 260MHz-1300MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- UMC
- 65nm
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UMC L55LP 55nm General Purpose PLL - 120MHz-600MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- UMC
- 55nm
- LP
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UMC L55SP 55nm General Purpose PLL - 260MHz-1300MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- UMC
- 55nm
-
UMC L40LP 40nm General Purpose PLL - 150MHz-750MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- UMC
- 40nm
- LP
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UMC L40G 40nm General Purpose PLL - 340MHz-1700MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- UMC
- 40nm
-
UMC L65LP 65nm Deskew PLL - 60MHz-300MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 65nm
- LP
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UMC L65LP 65nm Deskew PLL - 120MHz-600MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 65nm
- LP
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UMC L65LP 65nm Deskew PLL - 240MHz-1200MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 65nm
- LP
-
UMC L55LP 55nm Deskew PLL - 60MHz-300MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 55nm
- LP
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UMC L55LP 55nm Deskew PLL - 120MHz-600MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 55nm
- LP
-
UMC L55LP 55nm Deskew PLL - 240MHz-1200MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 55nm
- LP
-
UMC L40LP 40nm Deskew PLL - 75MHz-375MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 40nm
- LP
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UMC L40LP 40nm Deskew PLL - 150MHz-750MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 40nm
- LP
-
UMC L40LP 40nm Deskew PLL - 300MHz-1500MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 40nm
- LP
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UMC L40G 40nm Deskew PLL - 170MHz-850MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 40nm
-
UMC L40G 40nm Deskew PLL - 340MHz-1700MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 40nm
-
UMC L40G 40nm Deskew PLL - 680MHz-3400MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 40nm
-
UMC L65LP 65nm Clock Generator PLL - 60MHz-300MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- UMC
- 65nm
- LP
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UMC L65LP 65nm Clock Generator PLL - 120MHz-600MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- UMC
- 65nm
- LP