Band Gap IP, Input: 1.1V, VBG=0.8V, UMC 40nm LP process
Input 1.1V, VBG=0.8V, Band Gap, UMC 40nm LP/RVT Low-K Logic process.
- UMC
- 40nm
- LP
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
Band Gap IP, Input: 1.1V, VBG=0.8V, UMC 40nm LP process
Input 1.1V, VBG=0.8V, Band Gap, UMC 40nm LP/RVT Low-K Logic process.
Band Gap IP, Input: 1.1V, VBG=0.48V, UMC 40nm LP process
Input 1.1V, VBG=0.48V, Band Gap, UMC 40nm LP/RVT Low-K Logic process.
Band Gap IP, Input: 1.0V - 1.8V, VBG=0.615V, UMC 0.18um G2 process
VBG=0.615V, VCCA=1.8V, VCCA_min=1.0V, Ivcca=23uA, UMC 0.18um GII Logic process low voltage.
Band Gap IP, Input: 0.945V - 1.155V, VBG=0.8V, UMC 28nm HLP process
Input 0.945V-1.155V, VBG=0.8V, Band Gap, UMC 28m HLP process.
Linear Regulator IP, Output: 3.3V/350mA, UMC 0.11um HS/FSG process
Input 4.5V-5.5V, 3.3V/350mA and 1.2V/350mA Voltage Regulator, UMC 0.11um HS/FSG Logic process.
Linear Regulator IP, Output: 3.3V/350mA, UMC 0.11um HS/AE process
Input 4.5V-5.5V, 3.3V/350mA and 1.2V/100mA Voltage Regulator, UMC 0.11um HS/AE (AL Enhancement) Logic process.
Linear Regulator IP, Output: 3.3V/300mA, UMC 0.11um HS/AE process
5V to 3.3V with 300mA driving capability, Cascode Structure Regulator, UMC 0.11um HS/AE (AL Enhancement) Logic process.
Linear Regulator IP, Output: 3.3V/150mA, UMC 0.11um HS/FSG process
Input 4.5V-5.5V, 3.3V/150mA Output Regulator, UMC 0.11um HS/FSG Logic process.
Linear Regulator IP, Output: 2.8V/20mA, UMC 55nm SP process
3.3V to 2.8V with 20mA driving capability, Linear Regulator, UMC 55nm SP/RVT Logic process.
Linear Regulator IP, Output: 2.8V/20mA, UMC 0.11um HS/AE process
3.3V to 2.8V with 20mA driving capability, Linear Regulator, UMC 0.11 um AE/HS Logic process.
Linear Regulator IP, Output: 2.5V/50mA, UMC 40nm LP process
3.3V to 2.5V with 50mA driving capability, Linear Regulator, UMC 40nm LP/RVT Low-K Logic process.
Linear Regulator IP, Output: 2.5V/300mA, UMC 0.11um HS/FSG process
3.3V to 2.5V with 300mA driving capability, Linear Regulator, UMC 0.11um HS/FSG Logic Logic process.
Linear Regulator IP, Output: 2.5V/200mA, UMC 65nm LL process
3.3V to 2.5V with 200mA driving capability, Linear Regulator, UMC 65nm LL/RVT Low-K Logic process.
Linear Regulator IP, Output: 1V/60mA, UMC 65nm SP process
1.8V to 1.0V with 60mA driving capability, Linear Regulator, UMC 65nm SP/RVT Low-K Logic process.
Linear Regulator IP, Output: 1V/150mA, UMC 55nm SP process
3.3V to 1.0V with 150mA driving capability, Linear Regulator, UMC 55nm SP/RVT Low-K Logic process.
Linear Regulator IP, Output: 1.8V/100mA, UMC 0.11um HS/FSG process
3.3V to 1.8V with 100mA driving capability, Linear Regulator, UMC 0.11um HS/FSG Logic process.
Linear Regulator IP, Output: 1.2V/50mA, UMC 0.11um HS/AE process
3.3V to 1.2V with 50mA driving capability, Linear Regulator, UMC 0.11um HS/AE (AL Enhancement) Logic process.
Linear Regulator IP, Output: 1.2V/400mA, UMC 0.11um HS/AE process
3.3V to 1.2V with 400mA driving capability, Linear Regulator, UMC 0.11um HS/AE (AL Enhancement) Logic process.
Linear Regulator IP, Output: 1.2V/150mA, UMC 55nm LP process
3.3V to 1.2V with 150mA driving capability, Linear Regulator, UMC 55nm LP/RVT Low-K Logic process.
Linear Regulator IP, Output: 1.2V/150mA, UMC 0.11um HS/AE process
3.3V to 1.2V with 150mA driving capability, Non-trim Linear Regulator, UMC 0.11um HS/AE (AL Enhancement) Logic process.