3.3V to 1.2V with 150mA driving capability without external capacitor(Cap-less); use trimming ports (need e-Fuse IP); Linear Regu…
- UMC
- 55nm
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
3.3V to 1.2V with 150mA driving capability without external capacitor(Cap-less); use trimming ports (need e-Fuse IP); Linear Regu…
3.3V to 1.2V with 350mA driving capability; Linear Regulator; UMC 0.11£gm HS/FSG logic process
3.3V to 1.2V with 220mA driving capability; Linear Regulator; UMC 0.11um eflash Process_x005F_x000D_
3.3V to 1.2V with 220mA driving capability; Linear Regulator; UMC 0.11um eflash Process
3.3V to 1.2V with 220mA driving capability; Linear Regulator; UMC 0.11um HS/AE (AL Enhancement) Logic Process
3.3v to 1.0v/100mA REG, Linear Regulator, UMC 55nm SP/RVT LowK Logic Process
3.3v to 1.0v/100mA REG, Linear Regulator, UMC 55nm SP/RVT LowK Logic Process
3.3V to 0.9V/150mA REG, Linear Regulator, UMC 28nm HPC Logic and Mixed-Mode Process
3.3V to 0.9V/150mA REG, Linear Regulator, UMC 28nm HPC Logic and Mixed-Mode Process
3.3V to 1.1V with 30mA driving capability; Linear Regulator; UMC 40nm LP/RVT LowK Logic Process
3.3V to 1.1V with 30mA driving capability; Linear Regulator; UMC 40nm LP/RVT LowK Logic Process
3.3v to 1.1v/300mA REG, Linear Regulator, UMC 40nm LP/RVT LowK Logic Process
3.3v to 1.1v/300mA REG, Linear Regulator, UMC 40nm LP/RVT LowK Logic Process
3.3v to 1.1v/200mA REG, Linear Regulator, UMC 40nm LP/RVT LowK Logic Process
3.3v to 1.1v/200mA REG, Linear Regulator, UMC 40nm LP/RVT LowK Logic Process
3.3V to 1.2V with 180mA driving capability; Linear Regulator; UMC 55nm eFlash LowK Logic process
3.3V to 1.2V with 180mA driving capability; Linear Regulator; UMC 55nm eFlash LowK Logic process
3.3V to 1.2V with 150mA driving capability, Istb=200uA; Linear Regulator; UMC 65nm LP/RVT LowK Logic Process
3.3V to 1.8V with 50mA driving capability; Capacitor-free Linear Regulator; UMC 28nm HPC Process
3.3V to 1.8V with 50mA driving capability; Capacitor-free Linear Regulator; UMC 28nm HPC Process
3.3v to 2.5v with 30mA driving capability without external capacitor (Cap-less), use trimming PADs; Linear Regulator; UMC 40nm LP…
3.3V input , Programmable Output 1.8V/1.2V with 300mA driving capability; Linear Regulator; UMC 55nm SP/RVT LowK Logic Process
3.3V to 1.8V/50mA REG with external Capacitor, UMC 28nm HPC Logic and Mixed-Mode Process
3.3V to 1.8V/50mA REG with external Capacitor, UMC 28nm HPC Logic and Mixed-Mode Process
1.4V~3.6V to 1.2V with 100mA driving capability; Linear Regulator; UMC 90nm LL/RVT LowK LOGIC PROCESS minLib Cell Library
3.3V to 1.8V/50mA REG with external Capacitor, UMC 28nm HPC Logic and Mixed-Mode Process
3.3V to 1.8V/50mA REG with external Capacitor, UMC 28nm HPC Logic and Mixed-Mode Process
3.3V to 2.5V Regulator with 150mA; UMC 40nm LP/RVT LowK Logic Process
3.3V to 2.5V Regulator with 150mA; UMC 40nm LP/RVT LowK Logic Process
3.3V to 1.8V/150mA REG with external Capacitor, UMC 28nm HPC Logic and Mixed-Mode Process
3.3V to 1.8V/150mA REG with external Capacitor, UMC 28nm HPC Logic and Mixed-Mode Process
3.3v to 2.5v/5mA , REG, Linear Regulator, UMC 55nm LP/RVT Logic Process
3.3v to 2.5v/5mA , REG, Linear Regulator, UMC 55nm LP/RVT Logic Process