A/D Converter IP, 10 bits, 1Msps, UMC 65nm LL process
1MSPS 10-Bit SAR Analog-to-Digital converter, UMC 65nm LL/RVT Low-K Logic process.
- 10 Bit
- UMC
- 65nm
- LL
ADC IP cores (Analog-to-Digital Converter IP) convert analog signals into digital data in modern SoC and ASIC designs, enabling interaction with real-world signals such as sensors, audio, and RF inputs.
These IP cores support various architectures including SAR ADC, pipeline ADC, and sigma-delta ADC, each optimized for different trade-offs between speed, resolution, and power consumption.
This catalog allows you to compare ADC IP cores from leading vendors based on resolution (bits), sampling rate, power efficiency, and process node compatibility.
Whether you are designing sensor interfaces, audio systems, industrial control applications, or RF front-ends, you can find the right ADC IP for your design.
A/D Converter IP, 10 bits, 1Msps, UMC 65nm LL process
1MSPS 10-Bit SAR Analog-to-Digital converter, UMC 65nm LL/RVT Low-K Logic process.
A/D Converter IP, 12 bits, 80Msps, I-Q Channels, UMC 55nm SP process
12-Bit 80MSPS Dual-channel Pipelined Analog-to-Digital converter, UMC 55nm SP/RVT Low-K Logic process.
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, UMC 55nm SP process
10-Bit 1MSPS SAR Analog-to-Digital converter with 8-to-1 Mux (all C-type), UMC 55nm SP/RVT Low-K Logic process.
A/D Converter IP, 10 bits, 80Msps, UMC 0.18um Logic/Mixed-Mode process
10-Bit 80MSPS Differential Analog-to-Digital converter, UMC 0.18um Logic/Mixed-Mode process.
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, UMC 0.18um G2 process
10-Bit 1MSPS single-end Analog-to-Digital converter with 8-to1 Mux, UMC 0.18um GII Logic process.
A/D Converter IP, 10 bits, 40Msps, UMC 0.18um Logic/Mixed-Mode process
10-Bit 40MSPS 2-channel Differential Analog-to-Digital converter, UMC 0.18um Logic/Mixed-Mode process.
A/D Converter IP, 10 bits, 1Msps, UMC 0.13um LL/FSG process
UMC 0.13um LL/FSG process, 1MSPS 10-Bit SAR Analog-to-Digital converter with rail-to-rail input feature.
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, UMC 0.13um LL/FSG process
FXAnalog-to-Digital converter140HC0L with 8-to1 Mux, UMC 0.13um LL/FSG Logic process.
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, UMC 0.13um LL/FSG process
10-Bit 1MSPS SAR Analog-to-Digital converter with 8-to-1 Mux, UMC 0.13um LL/FSG Logic process.
A/D Converter IP, 10 bits, 1Msps, with 8-to-1 input MUX, SAR type, UMC 0.11um HS/AE process
10-Bit 1MSPS SAR Analog-to-Digital converter with 8-to-1 Mux (All C-type), UMC 0.11um HS/AE (AL Enhancement) Logic process.
A/D Converter IP, 12 bits, 1Msps, with 8-to-1 input MUX, UMC 0.11um HS/AE process
12-Bit 1MSPS SAR Analog-to-Digital converter with 8-to-1 Mux (All C-type), UMC 0.11um HS/AE (AL Enhnacement) Logic process.
A/D Converter IP, 12 bits, 1Msps, with 8-to-1 input MUX, UMC 0.11um HS/AE process
12-Bit 1MSPS SAR Analog-to-Digital converter with 8-to-1 Mux, UMC 0.11um HS/AE (AL Enhancement) Logic process.
A/D Converter IP, 10 bits, 10Msps, UMC 0.18um G2 process
10-Bit 10MSPS Differential Analog-to-Digital converter, UMC 0.18um GII Logic process.
A/D Converter IP, 10 bits, 400Ksps, UMC 0.25um Logic process
10-Bit 400KSPS single-end Analog-to-Digital converter, UMC 0.25um Logic process.
A/D Converter IP, 10 bits, 40Msps, UMC 0.18um Mixed-Mode process
10-Bit 40MSPS Differential Analog-to-Digital converter, UMC 0.18um Mixed-Mode process.
A/D Converter IP, 18 bits, 96Ksps, UMC 0.25um Logic process
18-Bit 96KSPS differential Sigma-Delta Analog-to-Digital converter, UMC 0.25um Logic process.