150ns rising edge delay circuit, not trimmable
150ns rising edge delay circuit, bias current to C based, not trimmable
- TSMC
- 180nm
- BCDG2
- Silicon Proven
150ns rising edge delay circuit, not trimmable
150ns rising edge delay circuit, bias current to C based, not trimmable
10ns rising edge delay circuit, RC-based, trimmable
10ns rising edge delay circuit, RC-based, trimmable
Adjustable delay block for dual-phase regulator operation
Adjustable delay block for dual-phase regulator operation
Inverter based delay chain, 5ns
Inverter based delay chain, 5ns
Inverter based delay chain, 10ns
Inverter based delay chain, 10ns
Zero-cross detector and valley OCP block, trimmable
Zero-cross detector and valley OCP block, trimmable
HS current protection circuit
Current monitor circuit, Vout=1.2V+0.06V*Iload
Current monitor circuit, Vout=1.2V+0.06V*Iload
5A DCDC, 0.60...1.43V switching regulator using COT switch mode, Vin=4.25...15V
5A DCDC, 0.60...1.43V switching regulator using COT switch mode, Vin=4.25...15V
10-bit 1MHz R-2R DAC, VREF=2.56V, voltage step = 2.5mV, INL
Charge pump, makes Vin-3.3V voltage
Charge pump, makes Vin-3.3V voltage
Voltage sense comparator, relatively slow, <10mV offset
Voltage sense comparator, relatively slow,
Error comparator, for PWM generation in the DCDC
Error comparator, forms base for PWM generation in the DCDC regu
Current monitor comparator
Bandgap cell, 1.2V, trimmable, no buffering
Bandgap cell, 1.2V, trimmable, no buffering
Bandgap (1.2V)+ buffers + current bias
Bandgap (1.2V)+ buffers (2.56V, 1.2V) + current bias (n*0.5uA), all trimmable
Reference amplifier, with adjustable gm value
Reference amplifier, with adjustable gm value
40nm LP 2.5V/1.1V Programmable Sigma Delta ADC [2ch]
40nm LP 2.5V/1.1V Programmable Sigma Delta ADC [2ch]
10/100/1000 base T ethernet Phy
IP
TSMC 40LP Crystal Oscillator, Ultrastable spec
The ShortLink Crystal Oscillator 'SL40LP_HPXO_1' is a mixed signal crystal oscillator driver designed for low power, quick start-…