MIPI DPHY v1.2 TX 4 Lanes - TSMC 28HPC+ 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
- MIPI D-PHY
- TSMC
- 28nm
- HPC+
MIPI DPHY v1.2 TX 4 Lanes - TSMC 28HPC+ 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY v1.2 RX 4 Lanes - TSMC 28HPC+ 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY v1.2 RX 2 Lanes - TSMC 28HPC+ 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY v1.2 TX 4 Lanes - TSMC 28HPC 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY v1.2 TX 2 Lanes - TSMC 28HPC 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY v1.2 RX 4 Lanes - TSMC 28HPC 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY v1.2 RX 2 Lanes - TSMC 28HPC 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Tx 4 Lanes - TSMC 22ULP 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Tx 2 Lanes - TSMC 22ULP 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Rx 4 Lanes - TSMC 22ULP 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Rx 2 Lanes - TSMC 22ULP 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY v1.2 TX 4 Lanes - TSMC 22ULL 2.5V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY v1.2 TX 2 Lanes - TSMC 22ULL 2.5V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY v1.2 RX 4Lanes - TSMC 22ULL 2.5V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY v1.2 RX 2 Lanes - TSMC 22ULL 2.5V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Tx 4 Lanes - TSMC 22ULL 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Tx 2 Lanes - TSMC 22ULL 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Rx 4 Lanes - TSMC 22ULL 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Rx 2 Lanes - TSMC 22ULL 1.8V, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…