Bandgap cell, 1.2V, trimmable, no buffering
CoreHW
•
HQ:
Finland
Bandgap cell, 1.2V, trimmable, no buffering
- TSMC
- 180nm
- BCDG2
- Silicon Proven
Compare 3,969 TSMC IP Cores from 81 vendors
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Bandgap (1.2V)+ buffers + current bias
CoreHW• HQ: FinlandBandgap (1.2V)+ buffers (2.56V, 1.2V) + current bias (n*0.5uA), all trimmable
- TSMC
- 180nm
- BCDG2
- Silicon Proven
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Reference amplifier, with adjustable gm value
CoreHW• HQ: FinlandReference amplifier, with adjustable gm value
- TSMC
- 180nm
- BCDG2
- Silicon Proven
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40nm LP 2.5V/1.1V Programmable Sigma Delta ADC [2ch]
Global UniChip Corp. (GUC)• HQ: Taiwan40nm LP 2.5V/1.1V Programmable Sigma Delta ADC [2ch]
- TSMC
- 40nm
- LP
- Silicon Proven
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10/100/1000 base T ethernet Phy
Terminus Circuits Pvt Ltd.• HQ: Bangalore- 560094, IndiaIP
- TSMC
- 28nm
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TSMC 40LP Crystal Oscillator, Ultrastable spec
Shortlink• HQ: SwedenThe ShortLink Crystal Oscillator 'SL40LP_HPXO_1' is a mixed signal crystal oscillator driver designed for low power, quick start-…
- TSMC
- 40nm
- LP
- Pre-Silicon
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Voltage Regulator LDO, Adjustable 1.1V Output
Shortlink• HQ: SwedenThe ShortLink voltage regulator 'SL40LP_1V1LDO_1' is an analogue Low Drop-Out regulator based on a two-stage architecture.
- TSMC
- 40nm
- LP
- Pre-Silicon
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Sub-GHz 433, 868, 915MHz IEEE 802.15.4 RF Transceiver IP
Shortlink• HQ: SwedenThe ShortLink Sub-GHz Transceiver RF IP 'SL40LP_Sub1GHzTrx_1' is a mixed signal RF IP for the 433, 868 and 915MHz frequency bands.
- TSMC
- 40nm
- LP
- Pre-Silicon
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Bandgap Reference 1.22V bandgap, 1V & 0.5V Output
Shortlink• HQ: SwedenThe ShortLink voltage reference and bias generator 'SL40LP_1V2BG_1' is based on a bandgap architecture.
- TSMC
- 40nm
- LP
- Pre-Silicon
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Fractional-N PLL Widely Programmable
Shortlink• HQ: SwedenThe ShortLink Fractional-N PLL 'SL40LP_2G1PLL_1' is a widely programmable delta sigma frequency synthesizer.
- TSMC
- 40nm
- LP
- Pre-Silicon
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Shortlink• HQ: Sweden
The ShortLink 10 bit Delta-Sigma ADC 'SL40LP_10bSDADC_1' is a mixed-signal ADC IP.
- 10 Bit
- TSMC
- 40nm
- LP
- Pre-Silicon
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SerDes PHY IP in TSMC (7nm, 12/16nm, 22nm, 28nm)
M31 Technology Corp.• HQ: TaiwanM31 Serdes PHY IP provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications.
- TSMC
- 7nm
- N7+
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10/100 Ethernet PHY for TSMC 22nm ULP
Sunplus Technology Co., Ltd.• HQ: Taiwan 3007610 100ETHERNET-T22ULP18 is a single-port DSP-based Fast Ethernet Transceiver.
- TSMC
- 22nm
- ULP
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USB3.0/PCIe2.0 Combo PHY in TSMC28HPC+
T2M GmbH• HQ: GermanyUSB3PCIE20T28HPCP is a USB3.0 and PCIe 2.0 Combo PHY IP solutoin designed for a mobile and data consumer applications in T28nm pr…
- USB 3.0
- TSMC
- 28nm
- HPC+
- In Production
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Aragio Solutions• HQ: USA
The I2C library provides open-drain bi-directional I/O cells designed for the I2C two-line interface.
- TSMC
- 7nm
- N7+
- Silicon Proven
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3.3V Power Support I/O Pad Set
Aragio Solutions• HQ: USAThe 3.3V Support: Power library provides a full complement of cells to support the assembly of a pad ring by abutment.
- TSMC
- 7nm
- N7+
- Silicon Proven
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3.3V 100 MHz Oscillator I/O Pad Set
Aragio Solutions• HQ: USAThe 1.8V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along …
- TSMC
- 7nm
- N7+
- Silicon Proven
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1.8V Programmable 100MHz Oscillator I/O Pad Set
Aragio Solutions• HQ: USAThe Oscillators library provides a programmable oscillator for on-chip asynchronous clock generation with an appropriate external…
- TSMC
- 7nm
- N7+
- Silicon Proven
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1.8V Power Support I/O Pad Set
Aragio Solutions• HQ: USAThe 1.8V Support: Power library provides a full complement of cells to support the assembly of a pad ring by abutment.
- TSMC
- 7nm
- N7+
- Silicon Proven
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CoreHW• HQ: Finland
Ramp generator - TSMC 180nm
- TSMC
- 180nm
- BCDG2
- Silicon Proven