TSMC CLN65LP 65nm Clock Generator PLL - 240MHz-1200MHz
True Circuits, Inc.
•
HQ:
USA
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 65nm
- LP
Compare 3,969 TSMC IP Cores from 81 vendors
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TSMC CLN65GP 65nm Clock Generator PLL - 130MHz-650MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 65nm
- GP
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TSMC CLN65GP 65nm Clock Generator PLL - 260MHz-1300MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 65nm
- GP
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TSMC CLN65GP 65nm Clock Generator PLL - 520MHz-2600MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 65nm
- GP
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TSMC CLN55GP 55nm Clock Generator PLL - 130MHz-650MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 55nm
- GP
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TSMC CLN55GP 55nm Clock Generator PLL - 260MHz-1300MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 55nm
- GP
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TSMC CLN55GP 55nm Clock Generator PLL - 520MHz-2600MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 55nm
- GP
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TaraCom Integrated Products, Inc.• HQ: USA
The TRC5024CPA is a four lane Gen 1 and 2 PCI Express Physical layer (Phy) Phy IP core, delivering high-speed serial data transmi…
- PHY
- TSMC
- 65nm
- GP
- Available on request
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Noesis Technologies• HQ: Greece
The NTadpcm core is fully compliant with G.726 standard and supports up to 64 full duplex voice channels.
- TSMC
- 180nm
- BCDG2
- Silicon Proven
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Clock and Data Recovery of HDB3/B3ZS coded signals
Noesis Technologies• HQ: GreeceAn all-digital solution suitable for clock/data recovery of HDB3/B3ZS coded signals.
- TSMC
- 180nm
- BCDG2
- Silicon Proven
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Additive White Gaussian Noise Generator
Noesis Technologies• HQ: GreeceA configurable AWGN generator that can be used as emulator of a noisy transmission channel.
- TSMC
- 180nm
- BCDG2
- Silicon Proven
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Noesis Technologies• HQ: Greece
Configurable interleaving/deinterleaving function that can be used in a wide range of applications that employ channel coding.
- TSMC
- 180nm
- BCDG2
- Silicon Proven
-
Noesis Technologies• HQ: Greece
configurable Viterbi Decoder compliant with the requirements of nearly all modern standards using Viterbi error correction.
- TSMC
- 180nm
- BCDG2
- Silicon Proven
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Configurable Reed Solomon Encoder
Noesis Technologies• HQ: GreeceA fully configurable Reed Solomon Encoder compliant with the requirements of nearly all modern standards that use Reed-Solomon er…
- TSMC
- 180nm
- BCDG2
- Silicon Proven
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Configurable Reed Solomon Decoder
Noesis Technologies• HQ: Greececonfigurable Reed Solomon Decoder compliant with the requirements of nearly all modern standards using Reed-Solomon error correct…
- TSMC
- 180nm
- BCDG2
- Silicon Proven
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TSMC CLN90GT 90nm DDR DLL - 212MHz-1060MHz
True Circuits, Inc.• HQ: USAThe DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
- TSMC
- 90nm
- G
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TSMC CLN90GT 90nm DDR DLL - 159MHz-795MHz
True Circuits, Inc.• HQ: USAThe DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
- TSMC
- 90nm
- G
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TSMC CLN90GOD 90nm DDR DLL - 172MHz-860MHz
True Circuits, Inc.• HQ: USAThe DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
- TSMC
- 90nm
- G
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TSMC CLN90GOD 90nm DDR DLL - 129MHz-645MHz
True Circuits, Inc.• HQ: USAThe DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
- TSMC
- 90nm
- G
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TSMC CL018LV 180nm DDR DLL - 64MHz-320MHz
True Circuits, Inc.• HQ: USAThe DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
- TSMC
- 180nm