SMIC 65nm LL(HVt) ECO cells compatible with HD standard cell library.
- SMIC
- 65nm
- LL
- In Production
SMIC 65nm LL(HVt) ECO cells compatible with HD standard cell library.
SMIC 65nm High-Density RVT Standard Library for Power Management Kit.
SMIC 65nm High-Density RVT Standard Library for LL Process.
SMIC 65nm High-Density RVT Standard Library for LL Process.
SMIC 65nm High-Density Low_vt Standard Library for LL Process.
SMIC 65nm High-Density Low_vt Standard Library for LL Process.
SMIC 65nm High-Density High_vt Standard Library for LL Process.
SMIC 65nm High-Density High_vt Standard Library for LL Process.
65nm LL(LVt) (HD1)High Density standard cell library.HD1 means only M1 used within cell
65nm LL(LVt) (HD1)High Density standard cell library.HD1 means only M1 used within cell
65nm LL(HVt) (HD1)High Density standard cell library. HD1 means only M1 used within cell
65nm LL(HVt) (HD1)High Density standard cell library.
65LL very high speed single-port SRAM compiler with RVT bit cell.
65LL very high speed single-port SRAM compiler with RVT bit cell.
65LL high speed two-port register file compiler with HVT bit cell.
65LL high speed two-port register file compiler with HVT bit cell.
65LL high speed dual-port SRAM compiler with HVT bit cell.
65LL high speed dual-port SRAM compiler with HVT bit cell.
65LL high speed VIA ROM compiler.
65LL high speed VIA ROM compiler.
SMIC 65nm LL 32.768KHz low-power oscillator IO for RTC application
IP
SMIC 65nm LL 32.768KHz oscillator IO
IP
IP
SMIC 65nm LL LPDDR interface for mobile-DDR application
IP
IP
IP
Translation cell between SP65NLLD2P_3P3V library and SP65NLLD2P_MEMIO_COMBO
SMIC 65nm LL Local ESD protection cell
IP
SMIC 65nm LL Standard analog IO
IP