This IP is a programmable Analog PLL suitable for high speed clock generation.
- Silterra
- 180nm
- G
- Pre-Silicon
This IP is a programmable Analog PLL suitable for high speed clock generation.
XRX018BCDMTP_16K8A is a BCD compatible embedded non-volatile memory IP with 16k8 ROM density.
XRX018BCDMTP_8K8A is a BCD compatible embedded non-volatile memory IP with 8k8 ROM density.
XRX018BCDMTP_16K8B is a BCD compatible embedded non-volatile memory IP with 16k8 ROM density.
XRX018ULLMTP_8K16 is a logic compatible embedded non-volatile memory IP with 8K16 ROM density.
VeriSilicon SMSB 0.18um Ultra-Low-Leakage(ULL) Process Synchronous Memory Compiler optimized for Silterra Malaysia Semiconductor …