UMC 55nm ULP/RVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60). W/O deep Nwell.
UMC 55nm ULP/RVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60).
- UMC
- 55nm
- ULP
- Pre-Silicon
Standard cell libraries are fundamental building blocks for ASIC and SoC design, providing a set of pre-characterized logic cells used in digital circuit implementation.
These libraries include essential components such as logic gates, flip-flops, latches, and buffers, enabling efficient synthesis and physical design flows.
This catalog allows you to compare standard cell libraries from leading vendors based on performance, power consumption, area, and process node compatibility.
Whether you are targeting high-performance computing, low-power mobile designs, or cost-sensitive applications, you can find the right standard cell library for your project.
UMC 55nm ULP/RVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60). W/O deep Nwell.
UMC 55nm ULP/RVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60).
UMC 55nm ULP/LVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60). W/O deep Nwell
UMC 55nm ULP/LVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60).
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C90) w/ Forward Bias.
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60) w/ Forward Bias.
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60). W/O deep Nwell
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60).
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C90). W/O deep Nwell.
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C90).
UMC 28nm HPM/RVT Logic Process 12-track generic cell library with LPLUS (C38)
UMC 28nm HPM/RVT Logic Process 12-track generic cell library with LPLUS (C38)
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library
UMC 28nm HPM/LVT Logic Process 12-track eco_m1_core library
UMC 28nm HPM/LVT Logic Process 12-track eco_m1_core library
UMC 28nm HPM/HVT Logic Process 12-track eco_m1_core library (C35)
UMC 28nm HPM/HVT Logic Process 12-track eco_m1_core library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 55nm eFlash/RVT Logic Process High Speed 12-track ECO_M1 cell library
UMC 55nm eFlash/RVT Logic Process High Speed 12-track ECO_M1 cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track ECO_M1 cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track ECO_M1 cell library
GF 65nm 3.3V Standard Cell Library
GF 65nm 3.3V Standard Cell Library
UMC 0.18um 9track Standard Cell Library, 1.8v operating voltage
UMC 0.18um Standard Cell Library
TSMC 0.13um 9track Standard Cell Library, 1.2v operating voltage
TSMC 0.13um 9 track Standard Cell Library
IBM 65nm LPE 3.3V Standard Cell
IBM 65nm LPE 3.3V Standard Cell Library
SMIC 0.18um Low Leakage 9 track Standard Cell Library,1.8v operating voltage
SMIC 0.18um Low Leakage 9T High-Density Standard Cell Library
SMIC 0.18um 3.3V Standard Cell Library,3.3v operating voltage
SMIC 0.18um 3.3V Standard Cell Library