Vendor: SmartDV Technologies Category: Channel Coding

FEC RS (198,194) IIP

FEC RS (198,194) core is compliant with standard Universal Serial Bus 4 Specification and standard VESA Display Port version 2.0/…

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Overview

FEC RS (198,194) core is compliant with standard Universal Serial Bus 4 Specification and standard VESA Display Port version 2.0/2.1 Specification. Through its compatibility, it provides a simple interface to a wide range of low-cost devices. FEC RS (198,194) IIP is proven in FPGA environment.

FEC RS (198,194) IIP is supported natively in Verilog and VHDL

Key features

  • Supports the Universal Serial Bus 4 Specification and VESA Display Port version 2.0/2.1 Specification.
  • Supports full FEC functionality.
  • Supports Reed Solomon (198,194) FEC, 8-bit symbols.
  • Supports the input and output data widths of multiples of 8-bit.
  • Supports the parity generation of 32 bits.
  • Supports the bit locker mechanism.
  • Supports the Syndrome calculation.
  • Supports the Berlekamp's algorithm.
  • Supports the Chien search for error position.
  • Supports the Error correction of 16 bits.
  • Supports up to the 2 symbols of error correction.
  • Supports the pipelined mechanism for the error correction.

Block Diagram

FEC RS (198,194) IIP block diagram

Benefits

  • Single site license option is provided to companies designing in a single site.
  • Multi sites license option is provided to companies designing in multiple sites.
  • Single Design license allows implementation of the IP Core in a single FPGA bitstream and ASIC.
  • Unlimited Designs, license allows implementation of the IP Core in unlimited number of FPGA bitstreams and ASIC designs.

What’s Included?

  • The FEC RS (198,194) interface is available in Source and netlist products.
  • The Source product is delivered in plain text verilog.If needed VHDL,SystemC code can also be provided.
  • Easy to use Verilog Test Environment with Verilog Testcases
  • Lint, CDC, Synthesis, Simulation Scripts with waiver files
  • Documentation contains User's Guide and Release notes.

Specifications

Identity

Part Number
FEC RS (198,194) IIP
Vendor
SmartDV Technologies
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact SmartDV Technologies

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Frequently asked questions about Channel Coding IP cores

What is FEC RS (198,194) IIP?

FEC RS (198,194) IIP is a Channel Coding IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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