Single Port SRAM Compiler IP, UMC 0.35um process
UMC 0.35um Logic process standard asynchronous high density Single Port SRAM memory compiler.
- SRAM
Embedded memory IP cores are fundamental components in modern SoC and ASIC designs, providing fast and efficient on-chip data storage for processors, accelerators, and peripherals.
These IP cores encompass a broad range of volatile and non-volatile memory technologies, including SRAM for high-speed data storage, ROM for fixed program and boot code storage, register files for processor and accelerator architectures, as well as EEPROM, eFuse/OTP, and MTP (Multiple-Time Programmable) memories for configuration data, security credentials, device calibration, and permanent system information.
This catalog allows you to compare embedded memory IP cores from leading vendors based on density, access time, power consumption, and process node compatibility.
Whether you are designing high-performance processors, AI accelerators, automotive systems, or IoT devices, you can find the right embedded memory IP for your design.
Single Port SRAM Compiler IP, UMC 0.35um process
UMC 0.35um Logic process standard asynchronous high density Single Port SRAM memory compiler.
Two Port Register File Compiler IP, UMC 0.35um process
UMC 0.35um Logic process standard asynchronous high density Two Port (1R1W) SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.35um process
UMC 0.35um Logic process standard asynchronous low density Low Power Single Port SRAM memory compiler.
One Port Register File Compiler IP, HJTC 0.18um pFlash process
HJTC 0.18um pFlash process synchronous Single Port Register File memory compiler.
Synchronous FIFO with second read/write port as companion to A2_CAM_FIFO
Synchronous FIFO with second read/write port as companion to A2_CAM_FIFO
Two Port Register File Compiler IP, UMC 0.162um Logic process
UMC 0.162um Logic process synchronous Two Port Register File SRAM memory compiler.
Two Port Register File Compiler IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process synchronous Two Port (1R1W) Register File SRAM memory compiler.
One Port Register File Compiler IP, UMC 0.162um G2 process
UMC 0.162um GII Logic process synchronous high density Single Port Register File SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process high density, Low Power mini Single Port SRAM.
One Port Register File Compiler IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process synchronous high density Single Port Register File SRAM memory compiler.
ROM Compiler IP, UMC 0.162um eHV process
UMC 0.162um eHV process synchronous 1P2M Metal ROM memory compiler.
ROM Compiler IP, UMC 0.153um MS process
UMC 153nm Mixed-Mode/Logic process synchronous Via1 ROM memory compiler.
Dual Port SRAM Compiler IP, UMC 0.153um MS process
UMC 153nm Mixed-Mode/Logic process synchronous high density Dual Port SRAM memory compiler.
SRAM/ROM Controller IP, SRAM/ROM Controller, Soft IP
Static memory controller with AXI interface.
AHB system Peripheral IP, SRAM/ROM Controller, Soft IP
Embedded synchronous Single Port SRAM/ROM memory controller with up to two AHB slave ports.
Single Port SRAM Compiler IP, UMC 0.162um G2 process
UMC 0.162um GII Logic process synchronous high density Single Port SRAM memory compiler.
ROM Compiler IP, UMC 0.162um G2 process
UMC 0.162um GII Logic process synchronous Via-1 programmable ROM memory compiler.
ROM Compiler IP, UMC 0.162um Logic process
UMC 0.162um Logic process synchronous diffusion programmable ROM memory compiler.
AHB system Peripheral IP, SRAM controller, Soft IP
Static memory controller with AHB interface.
SMIC 0.25um Single-Port/Two-Port Register File Compiler
IP