Vendor: Chip Interfaces ApS Category: CPRI

eCPRI

Size optimized, silicon agnostic IP core suitable for line rates upto 25G eCPRI core is a scalable and silicon agnostic implement…

Overview

Size optimized, silicon agnostic IP core suitable for line rates upto 25G

eCPRI core is a highly scalable and silicon agnostic implementation of the eCPRI standard targeting any ASIC or FPGA technologies. The eCPRI implementation builds on Chip Interfaces long-time experience designing CPRI and Radio-Over-Ethernet solutions for fronthaul and delivers a flexible engine that is prepared for tight integration with software applications.

The IP is designed to meet or exceed the requirements of radio systems, base band systems, fronthaul switches or advanced test systems. The speed optimized core can handle any solutions reaching from the “small footprint” to the most complex applications running 25 Gbps. The IP can dynamically be configured to handle wireless multi- mode radio systems enabling high-performance throughputs required by 4G and 5G wireless solutions.

Key features

  • Delivering Performance
    • Supporting small to large system configurations
    • Support for frequency-domain IQ transport
    • Support for various functional split between RU and BBU
    • Supports 10G/25G Ethernet MAC ports
    • Agnostically supports multiple synchronization schemes
    • Wide flexibility for configuring
  • Easy to use
    • Testbench with typical system configuration and examples
    • Easy integration
  • Silicon Agnostic
    • Targeting both ASICs and FPGAs

Block Diagram

eCPRI block diagram

Benefits

  • Test Environment: CPRI 7.0 IP is tested against a VIP model in UVM regression for full functional coverage
  • Silicon Agnostic: Optimized for ASIC but can be synthesized for most FPGAs
  • Interoperability Tested: Multiple field deployments and tested against CPRI references
  • Radio Expertise: IP with rich feature set designed by pioneers in radio solutions
  • Active Support: All support is actively provided by engineers directly

What’s Included?

  • The IP Core can be delivered in Source code or Encrypted format.
  • The following deliverables will be provided with the IP Core license:
    • Solid documentation, including User Manual and Release Note.
    • Simulation Environment, including Simple Testbed, Test case, Test Script.
    • Access to support system and direct support from Comcores Engineers.

Specifications

Identity

Part Number
eCPRI
Vendor
Chip Interfaces ApS
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Chip Interfaces ApS
HQ: Denmark

Learn more about CPRI IP core

JESD204 Frame Mapping explained from converter samples to lanes

The JESD204 Transport Layer oversees converter data mapping onto a set of JESD204 Lanes. The nature of these lanes is dependent on the version of the JESD204 standard and a function of the PCS and over the years despite the Serdes technology changing with ever increasing line rates, the function and features of the Transport Layer remained the same

Why What Where DIFI and the new version 1.3

This article will introduce the main concepts of the Digital Intermediate Frequency Interoperability (DIFI) standard including the new features introduced in version 1.3.  With no assumptions of prior knowledge from the reader this should serve as an introduction to the standard but also for those familiar with DIFI raise awareness of the added features of link establishment in new standard version.

Multiple ways JESD204 performs bitstream alignment

Bitstream alignment is a function of the Receiver (RX), as seen in the figure below it is the first functional block of the receiver right after the clock domain crossing (CDC) and gear boxing which are quite generic Serdes adaptation layer that can be found in almost every design working with a Serdes.

Frequently asked questions about CPRI IP cores

What is eCPRI?

eCPRI is a CPRI IP core from Chip Interfaces ApS listed on Semi IP Hub.

How should engineers evaluate this CPRI?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPRI IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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