Overview
The DVB-C Demodulator IP core is a silicon-proven IP core and extracted from the production chip, It is a complete QAM (quadrature amplitude modulation) demodulation and FEC (forward error correction) solution that performs IF to transport stream block processing of QAM signals. It is intended for the digital reception of compressed television, sound, and data services over cable. It is fully compliant with ITU-T J.83 Annexes A/B/C or DVB-C specification bitstreams (ETS 300 429, “Digital broadcasting systems for television, sound and data services – Framing structure, channel coding, and modulation - Cable Systems”). The IP integrates a Zero-IF interface to be compliant as well with direct IF tuners as with zero IF (I/Q) tuners.
This is Stand alone DVB-C Demodualtor IP core:
• EN300429 compliant
• ITU-T J.83B compliant but not in validation scope
• Nordig Unified 2.2.1 and SARFT compliant
• Up to 7.2Msps symbol rate
• 80 taps equalizer
Learn more about Modulation Demodulation IP core
This paper focuses on how direct RF sampling architecture has proved to be a felicitous approach for RF data conversion. The progress in converter technology has made it possible to increase the sampling rates and support very large bandwidth and multiple operating RF bands.
Synopsys is now shipping support for Bluetooth® 5.4, the latest specification from the Bluetooth SIG (Special Interest Group). The enhancements in Bluetooth 5.4 will open additional markets and use cases. This is one of the many inflection points in the Bluetooth Low Energy market that will be discussed in this paper.
Carriers are now deploying 5G across the globe driven by the need to keep up with relentless mobile data growth. 5G New Radio (NR) operates at higher frequencies to increase bandwidth, but at the expense of range. There will therefore be a need for a much larger number of 5G RUs to provide the same coverage. The availability of cost-effective, reliable and open 5G radio units is therefore critical.
This paper presents the design and performance of a key RF circuit necessary for the realization of a reconfigurable, integrated RF front-end: a tunable frequency, selectable bandwidth, on-chip, “SAW replacement” filter. The on-die tunable filter presented here has a tunable center frequency up to 1 GHz, a selectable bandwidth up to 40 MHz, and an adjacent channel rejection down to 60 dB.
To meet the demands for the multi-band, multi-mode wireless standards in the current market, a highly integrated wireless receiver (RX) is desired. CMOS technology has become the technology of choice for the integrated receiver design.
An efficient IP reuse strategy relies on IP blocks with wide applicability. That makes generic blocks, such as programmable processors preferable. However, in many applications such as handheld wireless terminals, additional silicon area and power consumption compared to fixed function solutions can not be accepted.
