Vendor: So-Logic Category: Edge AI Accelerator

Decision tree ensemble evaluation core based on serial evaluation of ensemble members

So_ip_edte_smpl_s core can be used to implement the ensemble member evaluation module as a part of an ensemble classifier consist…

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Overview

So_ip_edte_smpl_s core can be used to implement the ensemble member evaluation module as a part of an ensemble classifier consisting from decision tree with the previously defined structure directly in hardware. It uses single DT implementation module to serially evaluate every DT from the ensemble. This leads to area-efficient architecture with acceptable classification speed.
So_ip_edte_smpl_s core is delivered with fully automated testbench and a compete set of tests allowing easy package validation at each stage of SoC design flow.
The so_ip_edte_smpl_s design is strictly synchronous with positive-edge clocking, no internal tri-states and a synchronous reset.
The so_ip_edte_smpl_s core can be evaluated using any evaluation platform available to the user before actual purchase. This is achieved by using a time-limited demonstration bit files for selected platform that allows the user to evaluate system performance under different usage scenarios.

Key features

  • Implements ensemble classifier comprised from DTs with previously defined structure
  • Only one DT implementation module is used to evaluate every DT from the ensemble serially
  • Area-efficient implementation with acceptable classification speed
  • Supports classification problems that are defined by numerical attributes only
  • DTs with univariate or multivariate tests are supported
  • DTs with nonlinear tests are supported
  • Possibility to alter the implemented DT structure during the actual operation
  • No special IP blocks are needed to implement the core, only memory, adders and multipliers
  • User can specify the number format for all DT parameters in order to achieve the best performance/size ratio after implementation

What’s Included?

  • VHDL Source Code or netlis
  • Verification environment with regression suite
  • Technical documentation
  • Installation notes
  • User Manual
  • Datasheet
  • Instantiation templates
  • Reference Design
  • Technical Support
  • IP Core implementation support
  • Variable length maintenance
  • Delivery of IP Core updates, minor and major changes
  • Delivery of documentation updates
  • Telephone & email support

Specifications

Identity

Part Number
so_ip_edte_smpl_s
Vendor
So-Logic
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

So-Logic
HQ: Austria
Contact So-Logic

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Frequently asked questions about Edge AI Accelerator IP cores

What is Decision tree ensemble evaluation core based on serial evaluation of ensemble members?

Decision tree ensemble evaluation core based on serial evaluation of ensemble members is a Edge AI Accelerator IP core from So-Logic listed on Semi IP Hub.

How should engineers evaluate this Edge AI Accelerator?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Edge AI Accelerator IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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