Up to 60GHz Divide By 2 Prescaler with I and Q outputs in GiGe

Overview

The PMCC_DIV60G is a high speed (up to 60GHz) fully differential static frequency divider by 2, designed using Jazz SiGe120 (SBC18HX) technology. Differential architecture ensures substrate and power supply noise immunity. Macro features input active balun and I/Q outputs with 50 Ohm terminated output drivers (optional). Operation frequencies, I/O signal levels, control functions and features can be customized upon special agreement.

Key Features

Maximum input frequency: 60GHz
Fully differential 2 latch architecture
Differential quadrature output
Input active balun
Single 3.3V ±5% supply
Power consumption:

Core: 180mW
Active balun: 150mW

Layout area:

Core: 120x350 um
Core + Balun: 300x500 um

Benefits

Typical Applications
Prescaler for up to 60 GHz PLL Applications:
Phase–locked loop (PLL) applications from DC to 60 GHz
Point-to-point and point-to-multipoint radios
Broadband test and measurement equipment
Radar, electronic warfare, avionics, and space

Deliverables

GDS II file
Netlist for Spectre simulation
Layout and Schematic (DRC & LVS) verification reports
Complete macro datasheet
Macro integration/application notes
Design kit and software related information
Optional deliverables are:

Library containing entire hierarchy of macro schematic and layout cells
Extracted views containing parasitic components from layout
Verilog-A model replicating macro functionally
Simulation test-benches
Optional components specific to macro: biasing, specialized I/Os, glue-logic, transmission lines etc.

Technical Specifications

Foundry, Node

TowerJazz, 180nm SiGe

Maturity

Silicon Validated

Availability

now

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