The UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe-Advanced (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 specification for Chiplet products supporting various application verticals delivering an unparalleled PPA-differentiated feature-rich architecture.
UCIe PHY & D2D Adapter
Overview
Block Diagram
Technical Specifications
Related IPs
- D2D UCIe
- UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect
- UCIe-S PHY for Standard Package (x16) in Samsung (SF5A, SF4X, SF2)
- UCIe-S PHY for Standard Package (x16) in TSMC (N7, N6, N4P, N5, N3)
- UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3)
- GDDR6 PHY IP for 12nm