The ONFI multi-PHY is a versatile solution that accommodates ONFI4.0 to ONFI6.0 NAND flash interfaces, offering impressive speeds of up to 4800Mbps. This advanced technology seamlessly integrates support for CTT (Command Transfer Time), LTT (Address Transfer Time), and PI-LTT (Program and Input Transfer Time) signals. The robust ONFI multi-PHY not only ensures high-speed data transfers but also provides comprehensive support for various NAND flash interface versions, enhancing overall performance and adaptability.
ONFI PHY 4.8GT/s for ONFI v6 & JESD230G
Overview
Key Features
- Multi-interface support: ONFI6.0 up to 4800Mbps
- Multi-data-interface support: CTT (NVDDR3), LTT (NVLPDDR4) and PI-LTT
- Optimized for high performance and integration flexibility. The harden IP included 8-bit data blocks, up to 8 CE/channel, clock blocks, PLL, and DLL.
- High-resolution read/write delay adjust
- Per bit deskew on read/write data path
- Low power mode
- Dynamic frequency scaling
- Testability support: DFT, boundary scan, and BIST with loopback tests
- Advanced equalization, including TX FFE and RX DFE
- PI/SI design guidelines to ensure high data rate performance
- Advance clock structure to minimize jitter and automated interface timing margins with less power
Block Diagram
Technical Specifications
Related IPs
- NANDPHY 4.8GT/s for ONFI v6 & JESD230G
- ONFI IO v6.0, 4.8GT/s, TSMC N3P, 1.2V, N/S orientation, H&V cell
- ONFI IO v6.0, 4.8GT/s, TSMC N6, 1.2V, N/S orientation, H&V cell
- ONFI IO v6.0, 4.8GT/s, TSMC N7, 1.2V, N/S orientation, H&V cell
- UCIe-S PHY for Standard Package (x16) in TSMC N3E, North/South Orientation
- UCIe-S PHY for Standard Package (x16) in SS SF5A, North/South Orientation