MIPI UFS v2.1 Host Controller IP, Compatible with M-PHY and Unipro

Overview

UFS is a high performance, serial interface used in mobile systems to help communicate between host processor and mass storage devices like flash and other non-volatile memories. This communication is achieved via a UFS Host, using MIPI UniPro as Link and PHY for PHY layers. The UFS host controller interface is responsible for managing communication between host software and UFS device, needed for data transfers. It also performs interface management and power management /control processes. Our UFS Host works seamlessly with any UFS Device, along with MIPI UniPro and MPHY. Additionally we provide a complete solution including software and validation platforms.
Configurable Options :
• C-port
• Application Interface – APB or AXI

Key Features

Compliant with UFS Specification v2.1 and backward compatible t
AXI support
All UPIU processing
Data-in, data-out, command, response, RTT, query, task management and reject
Complete control of UIC Layer by UFS Host
Error reporting and handling
Priority arbitration between command, query and task management UPIUs and index-based processing within Command and Query UPIUs
Support for 32 UTP transfer request descriptors and 8 UTP task management descriptors for UFS host
Support for Boot LUN, RPMB, and well-known LUNs
Priority LUN handling
Security features

Benefits

Write-protect options include permanent and power-on protection
RMM-compliant synthesizable RTL design in Verilog
Easy-to-use test environment

Block Diagram

Applications

IOT
Automotive
Storage
Consumer
Embedded
Enterprise

Deliverables

Configurable RTL Code
HDL-based test bench and behavioral models
Test cases
Protocol checkers, bus watchers and performance Monitors
Configurable synthesis shell
Documentation
Design guide
Verification guide
Synthesis guide

Technical Specifications

Foundry, Node

Independent, suitable to all 3rd party PHY's

Maturity

In Production

Availability

Immediate

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