High Speed CCSDS Turbo Encoder
Overview
This is a high speed 16 state CCSDS compatible parallel concatenated turbo encoder.
Key Features
- 16 state CCSDS compatible turbo encoder
- Rate 1/2 to 1/7
- Interleaver sizes from 1784 to 16056 bits
- Up to 720 MHz internal clock
- Up to 359 Mbit/s encoding speed
- Serial continuous encoded data out
- 128 6-input LUTs
- Asynchronous logic free design
- Available as EDIF and VHDL core for Xilinx FPGAs under SignOnce IP License. ASIC, Intel/Altera, Lattice and Microsemi/Actel cores available on request.
Deliverables
- All Licenses
- EDIF Virtex-II, Spartan-3, Virtex-4 Core
- VHDL Virtex-5, Spartan-6, Virtex-6, 7-Series, UltraScale, UltraScale+ Core
- Test vector generation software
- VHDL ASIC License
- ASIC VHDL Core
- C++ bit/cycle exact simulation model
Technical Specifications
Availability
Now