DLL (All Digital) IP, Input: 200MHz - 533MHz, Output: 200MHz - 533MHz, UMC 65nm LP process

Overview

Input 200M-533MHz, output 200M-533MHz, all digital DLL with two-channel DQS delay range, UMC 65nm LP/RVT Low-K Logic process.

Technical Specifications

Short description
DLL (All Digital) IP, Input: 200MHz - 533MHz, Output: 200MHz - 533MHz, UMC 65nm LP process
Vendor
Vendor Name
Foundry, Node
UMC 65nm LP
UMC
Pre-Silicon: 65nm LP
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Semiconductor IP