Clean-room clone of Z180 TM CPU

Key Features

• Fully functional synthesizable Verilog HDL model of the Z80180 TM CPU
• Vendor and technology independent
• Software compatible with several industry-standard processors
• 181 Instructions, plus an undefined opcode trap
• Eight addressing modes
• 64K byte addressing capability
• 8 bit ALU with bit, byte and BCD operations
• 8x8 multiply instruction
• Powerful vectored interrupt capability
• Static, fully synchronous design
• Designed without 3-state busses
• Easily modified external interface

Technical Specifications