Vendor: Codasip Category: CPU

32 Bit - Embedded RISC-V Processor Core

Codasip® L110 is a 32-bit RISC-V embedded processor, focused on small-area and low-power applications.

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Overview

Codasip® L110 is a 32-bit RISC-V embedded processor, focused on small-area and low-power applications.

The core is highly configurable, allowing different area and performance levels, with optional support for standard RISC-V code size density extension.

It is also fully customizable, and, when used in combination with Codasip Studio, it enables an easy and no-risk way to add custom instructions.

Key features

  • Best-in-class performance for small-area and low-power applications
    • Delivering up to 50% improvements in performance per watt compared to similar cores in the market
    • Smaller and more performant than other RISC-V alternatives
    • Uses RISC-V standard extensions for area and code size reduction for additional power consumption reduction at system level
  • Highly configurable and easy and quick to customize and verify
    • High-quality pre-verified baseline excellent for further configurations and
    • customization
    • Easy to customize and verify thanks to Codasip Studio Fusion
    • Customization is without risk, because the functionality of the baseline core is guaranteed
  • Process compliant with ISO 26262 and ISO 21434
    • Developed using HW development process certified by TÜV SÜD
    • Development process certified for functional safety as well as cybersecurity

Block Diagram

Codasip L110 block diagram

Benefits

  • Ideal standard RISC-V IP for low area and low power applications, competitive in delivering performance per watt.
  • Highly configurable with optional support for standard code size density extensions. Excellent base to add custom instructions to further improve power, performance, and area for specific target application

Applications

  • Embedded

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
Codasip L110
Vendor
Codasip

Provider

Codasip
HQ: Germany
With semiconductor scaling failing, it is becoming necessary to design specialised cores optimised to a particular workload. With its open and modular ISA, RISC-V is a good basis on which to build a domain-specific accelerator. Codasip’s family of RISC-V cores covers the range from simple embedded applications to application processors capable of running Linux. The cores offer a variety of different pipeline lengths and computational options. These cores can be supplied in standard off-the-shelf configurations or can be extended using the Codasip Studio tool to achieve your unique processing requirements. Codasip Studio – used to develop the Codasip RISC-V cores – allows hardware and software design kits to be automatically generated from a high-level processor description language. Codasip began operations as a spinout from the Brno University of Technology/Faculty of Information Technology in 2014 based on 10 years of research. Codasip is a founding member of the RISC-V International and was the first company to offer a commercial RISC-V IP core in 2015. Today in addition to the original R & D centre in Brno, Czech Republic, Codasip has design centres in France and the UK. Codasip has sales offices in Europe, North America, China, Japan and Korea.
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Frequently asked questions about CPU IP cores

What is 32 Bit - Embedded RISC-V Processor Core?

32 Bit - Embedded RISC-V Processor Core is a CPU IP core from Codasip listed on Semi IP Hub.

How should engineers evaluate this CPU?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.

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