Vendor: SmartDV Category: UART

DALI Synthesizable Transactor

DALI Synthesizable Transactor provides a smart way to verify the DALI component of a SOC or a ASIC in Emulator or FPGA platform.

Overview

DALI Synthesizable Transactor provides a smart way to verify the DALI component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's DALI Synthesizable Transactor is fully compliant with standard DALI Specification and provides the following features.

Key features

  • Fully compatible with IEC 62386-101 Edition 2.0 2014-11 and IEC 62386-102 Edition 2.0 2014-11 Specifications
  • Supports complete DALI Tx/Rx functionality
  • Supports fully configurable serial interface
  • Supports programmable clock frequency of operation
  • Supports configurable baud rate
  • Supports two types of frame formats
    • 16-Bit Forward Frame
    • 20-Bit Reserved Forward Frame
    • 24-Bit Forward Frame
    • 32-Bit Reserved Forward Frame
    • Backward frame
  • Supports different Device addressing method
    • Short address
    • Group address
    • Broadcast unaddress
    • Broadcast address
    • Special command address
    • Reserved address
  • Supports direct arc power control (DAPC) command
  • Supports manchester encoding/decoding technique
  • Supports collision avoidance, collision detection and collision recovery
  • Supports all types of error insertion and detection
    • Start bit error
    • Stop bit errors
    • Response Timeout error
    • Manchester Encoding errors
    • Bi-phase Encoding errors
    • Framing errors
  • Supports Glitch insertion and detection
  • DALI VIP comes with complete testsuite to test every feature of DALI specification

Block Diagram

DALI Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the DALI testcases
  • Examples showing how to connect and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation also contains User's Guide and Release notes

Specifications

Identity

Part Number
DALI Transactor
Vendor
SmartDV
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV
HQ: India

Learn more about UART IP core

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SmartDV Licenses SDIO IP Family to Ranix for V2X Products

To meet RANiX’s unique design goals, SmartDV will customize the IP to go beyond the standard SDIO functionality—thereby empowering RANiX to differentiate from their competitors. SmartDV will also provide RANiX with the requisite support and documentation to achieve ASIL certification for ISO 26262.

SmartDV Rolls Out Multi-Phase Expansion Plan

SmartDV™ Technologies, provider of flexible, customizable semiconductor design IP (intellectual property) and verification solutions, has expanded engineering operations beyond its headquarters in Bengaluru with the opening of a new office space in Coimbatore, Tamil Nadu, India.

Frequently asked questions about UART IP cores

What is DALI Synthesizable Transactor?

DALI Synthesizable Transactor is a UART IP core from SmartDV listed on Semi IP Hub.

How should engineers evaluate this UART?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this UART IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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