CSMC0.13um 3.3V POR
The present IP is a Power On Reset (POR) circuit without any external resistor or capacitor.
Overview
The present IP is a Power On Reset (POR) circuit without any external resistor or capacitor. It supports a power supply range from 2.25V to 3.6V. A CLK (the frequency is set to 32.768KHz by default) is added to increase the delay of output reset signal.
Key features
- Process: SMIC 0.13um 1.2v/3.3v1P6M CMOS Logic Process
- Supply Voltage: 2.25V~3.6V
- Valid Power on Ratio : 1V/1us ~1V/100ms
- Quiescent Current: <1uA
- Operating Junction Temperature: - 40°C ~ +25°C ~ 125°C
Specifications
Identity
Provider
Learn more about Power On Reset (POR) IP core
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Frequently asked questions about Power-On Reset (POR) IP cores
What is CSMC0.13um 3.3V POR?
CSMC0.13um 3.3V POR is a Power On Reset (POR) IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.
How should engineers evaluate this Power On Reset (POR)?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power On Reset (POR) IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.