Vendor: IP Cores, Inc. Category: Symmetric Crypto

CMAC and XCBC AES Core

The CMAC1 core provides implementation of cryptographic hashes AES-CMAC per NIST SP 800-38B and AES-XCBC.

Overview

The CMAC1 core provides implementation of cryptographic hashes AES-CMAC per NIST SP 800-38B and AES-XCBC. The cores utilize “flow-through” design that can be easily included into the data path of a communication system or connected to a microprocessor: the core reads the data via the D input, key from the K input and outputs the hash result via its Q output. Data bus widths for D, K, and Q are parameterized. The design is fully synchronous and is available in both source and netlist form.

Key features

  • Completely self-contained; does not require external memory
  • CMAC algorithm per NIST SP800-38B and RFC 4493, AES-XCBC per CBC MAC submissions to NIST and RFC 3566.
  • Supports 128, 192, and 256 bit AES keys.
  • Flow-through design; flexible data bus width.
  • Self-checking test bench provided

Block Diagram

Applications

  • Message digest calculation
  • AES-CMAC-96
  • AES-XCBC-96
  • AES-CMAC-PRF-128
  • AES-XCBC-PRF-128
  • IPsec
  • TLS

Specifications

Identity

Part Number
CMAC1
Vendor
IP Cores, Inc.
Type
Silicon IP

Security

Crypto Algorithm
AES

Files

Note: some files may require an NDA depending on provider policy.

Provider

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Frequently asked questions about Symmetric Cryptography IP cores

What is CMAC and XCBC AES Core?

CMAC and XCBC AES Core is a Symmetric Crypto IP core from IP Cores, Inc. listed on Semi IP Hub.

How should engineers evaluate this Symmetric Crypto?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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