AMD Receives All Necessary Approvals for Proposed Acquisition of Xilinx
AMD (NASDAQ: AMD) today announced that it has received approval from all necessary authorities to proceed with the acquisition of Xilinx, Inc. (NASDAQ: XLNX).
Vendor:
Xilinx, Inc.
Category:
Test / Debug
ChipScope Pro IBERT for Spartan-6 GTP Transceivers
The LogiCORE™ ChipScope™ Pro Integrated Bit Error Ratio Tester (IBERT) core for the Spartan®-6 GTP transceiver is a customizable …
Overview
The LogiCORE™ ChipScope™ Pro Integrated Bit Error Ratio Tester (IBERT) core for the Spartan®-6 GTP transceiver is a customizable core that can be used to evaluate and monitor the health of the Spartan-6 GTP transceivers. The design includes pattern generators and checkers implemented in Field Programmable Gate Array (FPGA) logic, as well as access to the ports and dynamic reconfiguration port (Dynamic Reconfiguration Port) DPR attributes of the serial transceivers. Communication logic is also included and allows the design to be run-time accessible through Joint Test Action Group (JTAG). The IBERT core is a self-contained design, and when generated, runs through the entire implementation flow, including bit stream generation.
Key features
- Provides a communication path between the ChipScope Pro Analyzer software and the IBERT core
- Has user-selectable number of Spartan-6 GTP Transceivers
- Each transceiver can be customized for the desired line rate, reference clock rate, reference clock source, and data path width
- Requires a system clock that can be sourced from a pin or one of the enabled serial transceivers
Specifications
Identity
Part Number
ChipScope Pro IBERT for Spartan-6 GTP Transceivers
Vendor
Xilinx, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about SerDes Test / Debug IP cores
What is ChipScope Pro IBERT for Spartan-6 GTP Transceivers?
ChipScope Pro IBERT for Spartan-6 GTP Transceivers is a Test / Debug IP core from Xilinx, Inc. listed on Semi IP Hub.
How should engineers evaluate this Test / Debug?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Test / Debug IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.