Vendor: Dolphin Semiconductor Category: Audio Codec

Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with low latency

The tCOD120-SW3-LR-D.02 is a mixed (analog and digital) Virtual Component containing 3 monoADC, a stereo DAC with headphone ampli…

TSMC 22nm ULL Pre-Silicon View all specifications

Overview

The tCOD120-SW3-LR-D.02 is a mixed (analog and digital) Virtual Component containing 3 monoADC, a stereo DAC with headphone amplifier, and additional functions offering an ideal mixed signal front-end for ultra low power, fast wake-up and high quality audio applications. It combines also ultra low latency capability for ANC applications.

Key features

  • I2C and APB control interface
  • Embedded low noise voltage regulator for best resilience to power supply noise
  • Low BoM and capacitor-less input connection
  • High dynamic range for high quality recording in far-field applications
  • Programmable ultra low latency capability
  • Fast wake-up suitable for the unique analog VAD WhisperTrigger-A
  • Ultra low power mode, ideal for battery powered voice first devices

Block Diagram

Silicon Options

Foundry Node Process Maturity
TSMC 22nm ULL Pre-Silicon

Specifications

Identity

Part Number
tCOD120-SW3-LR-D.02_TSMC_22_uLL
Vendor
Dolphin Semiconductor
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Audio Codec IP core

Paving the way for the next generation audio codec for the True Wireless Stereo (TWS) applications - PART 1 : TWS challenges explained

The audio market for wireless Bluetooth headsets is growing rapidly. Audio devices using Bluetooth (BT) connectivity are more ubiquitous than ever. People have gotten used to wireless audio systems, and the mobile phone industry is pushing towards a world without audio connectors and cables. The latest trend in wireless headsets and speakers is True Wireless Stereo systems (TWS), consisting of two independent units that are each charged in their own charging case.

Thorough validation: the conundrum of Pulsed latch libraries turned practical as Spinner systems

Using pulsed latches instead of flip-flops is a solution that has been thoroughly studied for its advantages in speed, density, and power consumption reduction [1] [2]. Even so, this solution has not been widely adopted by standard cell library providers because of the difficulties related to timing verifications: pulse width integrity and hold time closure. There is also a lack of EDA tools natively supporting this feature. Dolphin Integration delivers standard cell libraries based on pulsed latches (SESAME uHD libraries) that can be used in standard design flows and fully compatible with the most common EDA tools.

Frequently asked questions about Audio Codec IP cores

What is Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with low latency?

Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with low latency is a Audio Codec IP core from Dolphin Semiconductor listed on Semi IP Hub. It is listed with support for tsmc Pre-Silicon.

How should engineers evaluate this Audio Codec?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Audio Codec IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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