Vendor: ASICS World Services, LTD. Category: SATA Controller

ATA-7 (UDMA 133) Target Interface

This is a ATA-7 compliant device interface core used for interfacing custom devices to IDE controller.

Overview

This is a ATA-7 compliant device interface core used for interfacing custom devices to IDE controller. Core is targeted for SOC implementations in ASIC and FPGA.

Key features

  • PIO modes 0-4
  • IORDY signaling for PIO cycle extension
  • Multi-word DMA modes 0-2
  • Ultra DMA modes 0-6
  • Programmable timings for PIO and DMA modes
  • Support for Ultra DMA pause and termination
  • Standard slave Wishbone interface to microprocessor/microcontroller
  • Interrupt generator for IRQ driven software driver implementation
  • Automatic handling of BSY and DRQ bits
  • DMA engine and master Wishbone interface for data transfer
  • Small register FIFOs for transmit and receive data
  • Acts as a single, master ATA/ATAPI device on ATA cable
  • 66MHz clock for UDMA133 (mode 6) operation

Block Diagram

ATA7_TARGET1 block diagram

Benefits

  • Flexible
  • Compact
  • Cost-effective
  • Many Shipping Products

What’s Included?

  • Verilog Source Code
  • Test Bench
  • Sample Syntheis scripts
  • Dcumentation

Specifications

Identity

Part Number
ATA7_TARGET1
Vendor
ASICS World Services, LTD.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about SATA Controller IP core

High Speed Data Recorder

A new IP Core from ASICS World Services, provides a complete high speed data recorder, in one easy to use block.

SATA Connectivity solutions for Xilinx FPGAs

This Whitepaper gives an overview over the Serial ATA (SATA) protocol and the implications when integrating SATA into an FPGA-based programmable system. Besides details of the different protocol layers, we will discuss the hardware and software components for building a complete, reliable, high-performance SATA solution by utilizing a design platform from Missing Link Electronics (MLE).

ASICS World Services Achieves Compliance Certification for it's SATA Host IP Core

SICS World Services, Ltd. is proud to announce that it is one of the first companies to achieve Compliance Certification for it's SATA Host IP Core. The SATA I/II/III Host Controller IP Core is a full featured SATA Host controller, that provides auto-speed negotiation, various power modes, as well as native and legacy software interfaces.

ASICS World Services Announces USB 3.0 Device IP Core

ASICS World Services, LTD. today released it's USB 3.0 Device IP Core. The USB 3.0 Device IP Core, supports SuperSpeed transfer speeds of 5Gbit/sec., and can be implemented in any technology, from FPGA to full custom ICs. Direct support is provided for Xilinx Virtex 5 FPGA with GTX transceiver, offering a true single chip solution, without the need for external PHYs. This IP Core also features an industry standard PIPE PHY interface for integration with 3rd party PHYs.

Frequently asked questions about SATA Controller IP

What is ATA-7 (UDMA 133) Target Interface?

ATA-7 (UDMA 133) Target Interface is a SATA Controller IP core from ASICS World Services, LTD. listed on Semi IP Hub.

How should engineers evaluate this SATA Controller?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SATA Controller IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP